IC designers experiment various circuit architectures to realize their circuits in order to meet the required functional performance specifications, while optimizing for power and area. From leaf level to upper levels, it is a systematic verification with simulation plans. Many iterations go into layouts needing re-verification. Simply put, a designer’s life revolves around creating the most robust testbenches to validate their circuit creations with realistic input stimuli and output loading, and this needs precision analysis. Easily said but highly complex in reality, given the complications of advancing process technology, especially with worsening device noise and physical proximity effects in denser designs. So where do S-parameters fit in the busy life of a designer?
IC designers must now deal with much more power and ground signals and their distribution on die, on package and on board. The same goes for clocks and other signals. To boost performance in SoCs, frequencies continue to reach new heights for high-speed serial links and memory interfaces, and so do CPU frequencies. Signal transmission and reflection needs to be well understood to properly design for signal integrity in various signal conduits. Furthermore, custom passive structures such as inductors, capacitors, and resistors are being innovated in each technology progression to meet design challenges and specifications related to frequency synthesis, noise filtering and bandwidth extension. Components with frequency effects are best modeled in the frequency domain, and here’s where S-parameter models come in.
S-parameters (or Scattering parameters) are mostly used to model passive systems such as inductors, capacitors, transmission lines, cables, packages, bond wires, microwave distributed circuits, etc. LC VCO designers specifically indulge in experimenting various inductor architectures modeled with S-parameters for easy inclusion into VCO analysis before attempting physical layouts. S-parameters are also used to model high-speed digital interconnects and channels including PCB traces, vias, connectors, and packages to characterize the effects of impedance mismatches, reflections, losses, dispersion, and crosstalk. SerDes designers also put them to heavy use in early design stages for formulating budgets for power, gain and noise where it is crucial to know frequency-induced effects and impedance mismatch effects. Low noise amplifier (LNA) designers find S-parameters valuable to design input and output matching systems to optimize the tradeoff between gain uplift and noise figure minimization.
Industry EM field solvers can generate S-parameters, however the circuit simulator needs to handle its complexity with accuracy, and not choke on convergence issues. Convergence is a growing problem with increasing S-parameter blocks and S-parameter ports within a simulation testbench. Analog FastSPICE, Siemens EDA’s signature circuit simulator, has invested significantly into S-parameter handling for enhanced usability and performance to simplify things for the users, so they have one less thing to worry about in their time crunched tapeout schedules.
What are S-parameters and its benefits? Why do its physical properties such as passivity, causality and reciprocity matter? Why is fitting important? How to extract a good S-parameter model? Are there alternatives to S-parameters? Where is the latest innovation from Siemens EDA in this front?
Find out answers to these questions from our recently published white paper, industry article (Semiconductor Engineering), and upcoming webinar!
Webinar #2: Advanced analog design using S-parameters << Sign up now! Tuesday, August 22, 2023 at 8:00 am (Pacific Time). This webinar highlights the importance of S-parameters to IC design and how Semtech Corporation, a high-performance semiconductor, IoT systems and Cloud connectivity service provider, utilizes Siemens AFS XT simulation technology to accelerate their design process without compromising on accuracy to develop differentiated analog solutions for wired and wireless applications. Two case studies on 26GBd Analog Delay Line and 25Gb/s Receiver will be showcased.
In these presentations, we focus on the value of S-parameters in circuit verification for accurate design considerations, and how AFS simulation technology can broaden the IC designs verification scope for enhanced performance, convergence, memory consumption, features, usability and debugging.
Intelligent solutions from Custom IC Verification (CICV) platform comprise of Analog FastSPICE eXTreme (AFS XT), Symphony Pro, Solido Variation Designer, Solido Characterization Suite and Solido IP Validation solutions powered by AI technology. These technologies offer differentiated performance with proven accuracy and high ease of use with 400+ customers globally.
To learn more about Siemens‘ Analog FastSPICE platform, visit: https://eda.sw.siemens.com/en-US/ic/analog-fastspice/