What to see at SPIE 2017

It is time again for the SPIE Advanced Lithography conference.

This year SPIE runs from Sunday, February 26, to Thursday, March 2 at the San Jose Convention Center. Mentor Graphics experts will be delivering conference papers, post sessions, and answering your questions in booth 221. Enter a raffle to win a Bluetooth earpiece + charging capsule at our booth.

As always, Mentor is well represented in the technical area with 10 papers and 10 posters. You can download the list of our technical presentations here

Mentor’s presence this year is skewed to research on emerging technologies, including directed self-assembly (DSA) and multipatterning, two topics Mentor continues to invest in and develop.

A number of the Mentor papers this year at SPIE Advanced Lithography are written jointly with leading-edge foundries that demonstrates the widespread usage and application of the Calibre tools at these various foundries

Samsung

• “Interlayer verification methodology for multi-patterning processes,” presented March 1 at 9:50am.
• “FinFET-induced anisotropy in printing of implantation shapes,” presented March 2 at 11:35am.
• “Early stage hotspot analysis through standard cell base random pattern generation” presented March 2 at 3:40pm.

GLOBALFOUNDRIES

• “Enhanced OPC recipe coverage and early hotspot detection through automated layout generation and analysis,” presented March 1 at 3:20pm.
• “Directed self-assembly (DSA) of Lamella-type of copolymers in self-aligned via (SAV) application from design to patterning,” presented March 1 at 4:10pm.
• “Effective use of aerial image metrology for calibration of OPC models,” presented March 2 at 8:40am.

SMIC 

• “Lithography and OPC friendly triple patterning decomposition method for via,” in the March 1 poster session.
• “A random approach of pattern library creation for full chip litho-simulation,” in the March 1 poster session.
• “Layout decomposition and analysis using pattern matching,” in the March 1 poster session.
• “A flexible and efficient way to set-up QA system based on pattern database management,” in the March 1 poster session.
• “An efficient way of layout processing based on pattern matching for defects inspection application,” in the March 1 poster session.
• “A fast and efficient method for device level layout analysis,” in the March 1 poster session.

STMICROELECTRONICS

• “Si-photonics waveguides manufacturability using advanced RET solutions,” presented March 2 at 9:40am.

Shanghai Huali Microelectronics Corp

• “Litho hotspots fixing using model-based algorithm,” in the March 1 poster session.

Topics at SPIE Advanced Lithography extends well past mask synthesis and RET/OPC and into DFM, design enablement, emerging technologies, and design-technology co-optimization. Mentor is a technology leader in all these areas and has an entire post-tapeout flow built on the Calibre platform.