We know…power integrity analysis can be a really big pain, especially for really big designs

By Joe Davis

Design teams use power integrity analysis to determine if the circuits in their designs will provide the intended performance and reliability as-implemented. For chip-level power integrity signoff, they run full-chip electromigration (EM) and voltage (IR) drop analysis to validate that the power grid can deliver the necessary current to the devices to function as designed, and to ensure that wires will not fail prematurely due to EM. Sounds like two very important functions, right?

For digital circuits and small analog blocks, there are good EDA solutions in the market to provide the detailed analysis necessary for confident tape-out. However, there isn’t a good solution for larger analog blocks and systems. Designers who want to run EM/IR analysis on large analog circuits encounter a lot of challenges and operational pain. Existing tools are difficult to use, lack robust interfaces for all design types and sizes, can’t simulate large netlists, and don’t offer much flexibility on extracted netlists. Collection of the required inputs is difficult and time-consuming. Designers have to create additional setups from the base process design kit (PDK). All of this costs time and money…

With existing tools, simulation-based dynamic analysis is generally limited to designs with fewer than ~1-2M transistors. Beyond this size, the typical approach is to force analog designers into a digital-like hierarchical formalism that isn’t well-suited for analog designs and design flows. What does that mean? The largest, most complex analog systems are over-designed and/or analyzed with tedious engineering workarounds that incur engineer time and risk. Not what you want to hear if that chip is intended to control the braking system in your new car.

But as of today, there’s a new tool in town. The mPower toolsuite is an innovative power integrity verification solution that brings analog and digital EM, IR drop, and power analysis together in one complete, scalable solution. Now, you can easily integrate analog and digital power analysis into your existing design flows while scaling to circuits and chips of any size. The mPower software enables design teams to perform analog and digital power integrity analysis from the smallest blocks to the largest full-chip layouts to verify that the design meets power-related design goals and performance:

  • Verify power for all modes
  • Identify and fix paths with insufficient voltage to drive loads
  • Identify and fix reliability issues related to current density

For analog designs, the mPower Analog tool brings scalability previously only available in the digital domain. Designers can run static and dynamic analysis on the largest, most complex blocks and chips. Our unique high-capacity (HC) dynamic analysis functionality is a simulation-based EM/IR analysis that enables fast, accurate power integrity analysis of 5G sensors, AI/ML, multi-core, chiplets, and other large and complex IC systems.

On the digital side, the mPower Digital solution provides digital power integrity analysis with massive scalability for fast runtimes. It also uses industry-standard inputs throughout the flow, which minimizes costs and increases re-use. mPower Digital can handle the largest designs in the industry and is already qualified for multiple foundries.

Underlying both tools is the simple, straightforward TCL command language, which makes it easier for designers to get up to speed quickly and achieve proficiency, even if they only use the tools infrequently. Adding to the ease of use is the mPower GUI, which provides a single standard interface for invocation and results debugging.

Want high-confidence power analysis tapeouts for ALL your designs? You may want to read our paper: Introducing mPower: Uncompromised power integrity for the whole design, at any scale

Interested in learning more about the mPower solution? Visit our webpage

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/calibre/2021/09/28/we-knowpower-integrity-analysis-can-be-a-really-big-pain-especially-for-really-big-designs/