By James Paris – Mentor, A Siemens Business
Design data integrity is crucial to both product quality and tapeout schedules. Calibre applications support a comprehensive data validation flow that ensures consistent data integrity throughout the entire design flow.
We all know the definition of the acronym GIGO—Garbage In, Garbage Out. Almost the first lesson everyone who works with data in any way learns is that if your data is not valid or accurate, your results are worthless. That holds true as design data passes through multiple layout data formats as well. If the validity of the data is not carefully maintained throughout these transfers, you can’t trust any output generated from the use of the data.
In integrated circuit design today, there is typically no one single design flow, or one designer, or even a single design team. Different teams work together and separately, often in parallel, to complete all the tasks required to achieve tapeout. If they are not all using the same exact data, it can spell disaster for the design schedule. Unintended design changes can be introduced when a designer or computer-aided design (CAD) engineer converts design data from one format to another, or merges data from two databases. Adding physical design data validation checks throughout a design flow ensures that data remains constant and accurate throughout the flow.
Here are three critical stages for data validation:
- The most current P&R LEF data must match the chip-level GDS or OASIS data
- The most current IP GDS/OASIS cells must be in the final design before tapeout
- The front-end-of-line (FEOL) data must remain unchanged in staged tapeout flows (e.g, when FEOL data is taped out before back-end-of-line (BEOL) data)
Maintaining design data integrity throughout a project with appropriate data comparisons can avoid common pitfalls that often impact tapeout schedules, but typical data comparison techniques can require lengthy runtimes. The Calibre® nmPlatform includes several utilities that can be used in data validation flows to both shorten data comparison runtime on large input designs and to validate data integrity beyond a simple layer comparison.
Take out your (data) trash! To learn more about these utilities, and how your teams can benefit from them, download a copy of our white paper, Maintaining Design Data Integrity from Cell Design to Tapeout with Comprehensive Data Validation