Thought Leadership

New Verification Academy Advanced OVM (&UVM) Module

I’ve always loved the Chinese proverb, “Give a man a fish and you feed him for a day. Teach a man to fish and you feed him for a lifetime.” Yet, why merely settle for fish when you can have sushi! My point is, to remain strategically relevant in today’s competitive landscape, it is necessary to constantly reinvent ourselves and evolve our technical skills. To that end, we have created the Verification Academy to help you evolve your advanced functional verification skills.

Since we launched the Verification Academy, we have had numerous requests for training on the Open Verification Methodology (OVM). Hence, in February we launched a new module titled Basic OVM that has been received with overwhelming enthusiasm.  It’s currently our top viewed module. The Basic OVM module consists of 2.5 hours of content, and is divided into eight 20-minute sessions. The module is primarily aimed at existing VHDL and Verilog engineers who recognize they have a functional verification problem, but have little or know experience with constrained-random verification or object-oriented programming. Our goal for releasing the Basic OVM module is to raise your skill level to the point where you have sufficient confidence in your own technical understanding. In turn, you will have the confidence required to start the process of adopting advanced functional verification techniques.

This month, we are excited to announce the next step in evolving your Open Verification Methodology skills. Our new module is titled Advanced OVM (&UVM) and provides a higher level of OVM understanding beyond what is presented in our previously released Basic OVM module. What’s particularly exciting about this release is that we are addressing the numerous requests from you concerning advanced functional verification and creating contemporary testbenchesusing the OVM. The Advanced OVM module is presented by our own subject matter expert, Tom Fitzpatrick, who has been a driving force behind the OVM development and standardization. Tom is one of my favorite technical presenters. He is both informative and entertaining, so I’m sure you will really enjoy our new Advanced OVM module.

Now, as shown in Table 1, the Verification Academy covers a wide variety of topics, which enables you to start evolving your advanced functional verification skills.

Table 1. Verification Academy Modules

Module Name

Number of
Sessions

Description

Evolving Capabilities

1

This module provides a framework for all the modules within the Verification Academy, while introducing a tool for assessing and improving an organization’s advanced functional verification capability

Assertion-Based Verification

11

This module provides a comprehensive introduction to ABV techniques, include an introduction to SystemVerilog Assertions

CDC Verification

7

This module provides an understanding of the clock-domain crossing problem, in terms of metastability and reconvergence, and then introduces verification solutions

FPGA Verification

8

This module, although targeted at FPGA engineers, provides an excellent introduction to anyone interested in learning various functional verification techniques

Basic OVM

8

This module provides a step-by-step introduction to the basics of OVM

Advanced OVM

5

This module provides the next level of understanding beyond the skills introduced in the Basic OVM module

Another exciting announcement is that we have added a language capture option to most (and eventually all) Verification Academy modules.  The language options include: Chinese Simplified and Traditional, Japanese and Russian.

In the next few weeks we have another exciting announcement related to the Verification Academy.  Stay tuned!

I would like to encourage you to check out all our new and existing content at the Verification Academy by visiting www.verificationacademy.com.

Harry Foster
Chief Scientist Verification

Harry Foster is Chief Scientist Verification for Siemens Digital Industries Software; and is the Co-Founder and Executive Editor for the Verification Academy. Harry served as the 2021 Design Automation Conference General Chair, and is currently serving as a Past Chair. Harry is the recipient of the Accellera Technical Excellence Award for his contributions to developing industry standards. In addition, Harry is the recipient of the 2022 ACM Distinguished Service Award, and the 2022 IEEE CEDA Outstanding Service Award.

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/verificationhorizons/2010/06/25/new-verification-academy-advanced-ovm-uvm-module/