Customizing chips for the AI age
Building AI-enabled devices requires more than just building smarter models, in many cases, it requires the right chips to run on as well. Large GPUs and high power AI accelerators currently dominate this market but, to help accelerate AI on everything from smart sensors to laptops to smartphones, smaller, purpose-built chips are a must.
In a recent podcast, host Spencer Acain was joined by Russell Klein, program director for Siemens EDA’s high-level synthesis (HLS) team, to examine the benefits of using HLS when it comes to developing highly customized and efficient AI chips, and why that’s important for AI as a whole.
Check out the full episode here or keep reading for some of the highlights of that conversation.
Improving custom chips for AI
Data is an all-important part of any AI system yet storing and processing that data is also a major challenge. Data comes in all sizes and AI models are also designed to process that data in different ways, resulting in very different needs for storage and processing depending on the exact implementation. Russ gives the example of a GPU designed to process arrays of 512 elements at a time while, for example, an AI algorithm running on a smart watch may only need to process 90 elements at a time. In this example, the GPU would be largely unused. On the other hand, a larger array of 700 elements processed on the same GPU would require two passes to process all the elements, halving throughput.
This is just a simple example, but there are may such considerations when it comes to chip design for specialized purposes, especially when power is a major concern. Rather then producing a general purpose chip that can handle any AI algorithm and data set, for specific workloads, employing HLS to create chips tuned to match both algorithm an data requirements will be key in adopting AI in otherwise difficult scenarios.
AI helps design flexible chips
Balancing the various factors required to optimize a chip design is no easy task and sometimes, required changes won’t come to light until much later in the design process, sometimes even at a point where its too late to make necessary changes to fully optimize the design. Currently, simulating many steps ahead in the chip design process to understand how the final chip will function largely isn’t possible but, as Russ explains, with AI, it may become possible in the future.
Using specially trained AI applied early in the design process, it would be possible to, with a fair degree of accuracy, predict many key characteristics of the final chip once it’s produced. This allows designers to make changes and course corrections early in the process, when it’s still quick and inexpensive to do so, allowing for chips to be more completely optimized than was possible before. This is thanks to AI’s ability to process far more data across multiple domains then a human can, taking in information from each successive step in the chip design process to accurately predict the final result from an early stage.
With AI looking to be integrated into more and more devices, the need for highly power efficient, highly customized chips that can be quickly designed and produced will grow massively in the future. To meet this need, a more flexible, AI-enhanced chip design process will be required, such as the one Russ envisions for Catapult and the HLS process. Using these methods, it will be possible to include powerful AI capabilities in tiny packages, putting greater intelligence at every users fingertips.
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