How AI is optimizing the IC test process Transcript – Part 2
In a recent podcast, Ron Press, Senior Director of Technology Enablement discussed the ways AI is being applied to the semiconductor design, test and verification process. Beyond exploring the applications of AI in this process, Ron also explored why AI itself is such an important technology for the semiconductor industry going forward. Check out the full episode here, or keep reading for the transcript.
Spencer Acain: Hello, and welcome to the AI Spectrum podcast. I’m your host, Spencer Acain. In this series, we explore a wide range of AI topics from all across Siemens and how they are applied to different technologies. Today, I’m joined once again by Ron Press, Senior Director of Technology Enablement at Siemens Digital Industry Software, as we continue our discussion on the many applications of artificial intelligence and machine learning within the chip design and test process, picking up where we left off last time.
I’d like to continue our discussion on the benefits you’re seeing from implementing what you called analytical AI into this whole process. Can you expand some more on that for me?
Ron Press: Yeah, so the big benefit is, one… There’s two areas. One is you don’t have to worry about all these variables that you would typically have. How many pins go to the block, how many pins are available at the top level, how big the patterns are. It removes all of those variables so you can just optimize at the core level and you don’t have to do all these trade-offs. And there was a paper that Intel basically said that by using SSN, their productivity was improved by 10X for doing their DFT architecture in the design, the upfront work. And then in the back end, since we automatically can optimize the packetized data delivery, we’re more efficient in how we can deliver the data as well as each core independently has clock generation, so we don’t have to time all these cores to shift and capture at the same time.
By giving us that independence, the power profile is greatly reduced. And at the international test conference two years ago, Amazon presented that they had about a 5X improvement in test time. That’s the recurring time for the production test, partially because the power profile is so greatly reduced, they can test the entire device at once. So that’s one type of AI that I mentioned, we call analytical AI.
The other type of AI that we use and we’ve been using for over a decade is machine learning. So with our diagnosis, basically we take the production test fails, we have all the scan data. Essentially in a semiconductor pattern, you might have thousands of patterns passing a few hundred patterns that are failing. And because we have the scan technology, you’ll have millions or maybe even hundreds of millions of virtual capture points. So this allows us to do a thorough diagnosis, and we can do this with all these devices that are failing in production.
So it’s essentially a digital twin of a failure analysis. We’re using software to figure out how we explain what’s going on in the device, why it failed these patterns, and because it’s in software and it’s quick, we can have tens of thousands of failed diagnosis locations worked out right away. And with all this big data, now we can apply machine learning to it, and with machine learning, we can find out is there some type of systematic yield limiter. And with that, with our yield insight, we’re able to figure out what’s going on in production, what do we need to do to improve the yield?
Spencer Acain: I see. It sounds like an important part of your tool here. It’s really helping speed things up in something that would be kind of slow otherwise, just the sheer volume of data and testing you’d have to do. So with that kind of in mind, what do you see as a major role of AI in the chip design test process going forward? For example, do you see the process becoming more autonomous or even fully autonomous compared to what it is now?
Ron Press: Yeah, I think what’s going to happen in the future is we’re still going to need engineering innovation, and we’re going to need people to make sure that the results are good results, even if we’re adding more AI. But the AI is really a tool to allow people to get their more complicated designs completed in the same amount of time or faster. So sometimes I hear people worry about, “Oh, it’s going to take away all these engineering jobs.” I don’t think it’s going to take away anybody’s work. It’s going to allow you to get more done quicker and be able to deal with more complicated designs more automatically. Overall, that’s how I see AI factoring into the future.
Spencer Acain: To build on that maybe a little bit, what are some of the challenges you faced bringing AI and machine learning to such a complex and cutting edge field as the semiconductor design and testing?
Ron Press: Well, I think anytime you have a new methodology, there’s some resistance to suddenly change and adopt something new. Scan technology took a little while for more and more companies to use it, but now it’s proliferated pretty well. Test compress, our embedded compression we put on top of the scan technology, that took several years to be widely adopted. The latest technology, SSN, which is the packetized data delivery, that adoption rate was basically a couple of years and it’s pretty much the standard in almost every advanced semiconductor design. We see that it’s proliferated all across the world in semiconductor design.
So I think people just have seen that the complexity of the architectures that are coming in, this was a necessity to be able to deal with that complexity. And I think that’s one of the roles that AI is going to be playing in the future, is it’s a way to automatically simplify the problem and let the user work at a higher level of abstraction. They still have to do work, they still have to get their job done, but the AI systems I see that we’re using will just make that design scaling easier to deal with and be able to get the work done rather than trying to use old methods.
Spencer Acain: It almost sounds like compared to, say manufacturing industry, in semiconductor where you’re dealing with such large and complex structures, that there’s maybe a little less resistance to adopting these kind of new and cutting edge technologies just because there’s no way to handle these structures without the latest tools and the most powerful systems almost would.
Ron Press: Yeah, Spencer, I think that’s exactly right, that because the design scaling and complexity is at a point it would be impossible to try to use old methods to come up with a architecture solution that could work on these giant designs and to create patterns as efficiently. And then on the other side, when you’re trying to make the yield, either you have a yield excursion or you’re trying initial yield ramp or trying to take a mature yield and grow it. If you didn’t have some type of a AI based system like we use with our root cause deconvolution, which uses machine learning, it would be really hard to find where is a systematic yield limiter that has an opportunity to improve on it and bring the yield up. To do that without some type of AI system, I don’t think would be even possible today.
Spencer Acain: Well, I think we’ve talked a lot about where you’re applying AI and machine learning within the software itself, but I think I’d like to take this slightly different direction and ask how is this technology being applied to the specific types of chips used for AI and AI inferencing? I know they’re designed a bit differently than a generic chip. So how is Tessent and all of its AI and ML capabilities apply to that?
Ron Press: Yeah, and that’s where I think some of the architecture improvements that we’ve used SSN for help a lot because the AI devices have a lot of repeated structures. Some of these devices have thousands of identical cores. And so we needed to have a solution that wasn’t testing each item in the design as a standalone item. Since these are identical cores, we have a way to basically serially broadcast through SSN the expected data for all these identical cores and do an on-chip compare. This allows us to test a design with four identical cores. It allows us to have almost the same test time as a design with four identical cores compared to a design with a thousand identical cores because we’re not making new patterns for all these additional identical cores, we’re just passing that expect data to all these cores. And like I said, it’s like a serialized broadcast.
So this way we can deal with all this scaling, this massive number of identical cores without having to grow the test time or the DFT work. So SSN is a great solution for AI types of designs. It’s not that we need AI to do the work on the AI type of design, but the kind of analytical AI we have with SSN makes it pretty easy. And part of the architecture that allows us to scale to any number of identical cores is the type of solution that was needed for AI designs.
Spencer Acain: That sounds like you were really… You’re almost applying some AI to the AI chip design process there. It’s very exciting. But maybe to wrap things up a little bit here, where do you see AI and ML being applied in the future of Tessent or in the test industry at large?
Ron Press: Yeah, so some of the things we’re working on, we have those features I mentioned that are already in the tools. We have some short-term features that are kind of simple, generative type of AI chatbots and command completion features that are coming up within the next year. And then longer term, we have some machine learning we’re looking at where we’ll understand the design and we’ll do training on-site at the customer. But from what we’ve trained on the design, the next design at that site will be much more efficient. I don’t want to get into details of how that’s going to work, but it’s stuff we’ve been working on that is very promising.
Spencer Acain: Well, I mean, that sounds like it’s going to be an exciting topic to talk about in maybe a year, two, three, maybe more, but think that’s about all the time we’ve got for this episode. So thank you for joining me, Ron. It’s been really enlightening.
Ron Press: Yeah, thank you Spencer.
Spencer Acain: Once again, I have been your host, Spencer Acain on the AI Spectrum podcast. Tune in again next time as we continue to explore the exciting world of AI.
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