By Stephen Pateras – Mentor, A Siemens Business
Automobiles are quickly transitioning from a simple means of transportation to a complex mobile electronic hub…
No matter whether your car displays the badge of Porsche, Toyota, or Google, the ICs that power the advanced safety features, the information and entertainment systems, and the efficiency and performance profiles must meet strict standards for quality and reliability. Mentor products are involved in the entire automotive development lifecycle; this blog focuses on the testing of ICs both after manufacturing and during in-system operation of the ICs once they are on the roads.
A top issue with testing automotive ICs is to prevent defects in the manufactured devices. To do that, you need to find and eliminate the causes of defects. Traditional fault models only consider faults on cell inputs and outputs and on interconnect lines between these cells. In other words, only faults abstracted to the netlist level are explicitly considered. However, it turns out, however, that increasingly more defects occur within the cell structures. If you have unlimited time for testing, you could detect all static cell-internal defects with the gate-exhaustive fault model, which applies every possible combination of inputs at every gate. For everyone on a schedule, there is Cell-aware ATPG and Cell-aware diagnosis.
Cell-aware ATPG, as part of Tessent TestKompress, directly targets specific defects internal to each cell. The process is described in detail in the whitepaper IC Test Solutions for the Automotive Market (see link below). Cell-aware test uses a fault model derived from an analog defect simulation and it is very effective. Cell-aware tests significantly improve defect detection and therefore reduce the number of devices that fail manufacturing test.
Of course, there will always be some devices that fail even on mature processes that are typically used for automotive ICs. These so-called yield excursions can affect long-term reliability, so quickly identifying and correcting the problem is important. Mentor’s diagnosis-driven yield analysis (DDYA) technology can rapidly identify the root cause of yield loss and effectively separate design- and process-oriented yield loss components. In a previously published case, one semiconductor company used the results from diagnosis analysis of 1300 failing die to improve mature yield by 1.5% in a few weeks.
In the latest improvement to DDYA, Mentor offers Tessent Cell-aware Diagnosis. Cell-aware failure diagnosis uses the fault models created by analog simulation to identify defects at the transistor level. This accelerates physical failure analysis (PFA) and aids yield analysis. One application is in context of large, complex cells such as adders, multipliers, and multi-bit sequential elements. Even when a defect is known to be within a cell, finding defects in such a complex cell in PFA is daunting. Determining whether such a defect is systematic or yield limiting typically requires the examination of a large number of failing die, which can take several months.
Several cell-aware diagnosis results have been published, based on technologies from 160nm down to 10nm FinFET. On average, the diagnosis resolution for cell internal defects was improved by 11.3X. Cell-aware ATPG and cell-aware diagnosis dramatically improve IC test and diagnosis, enabling automotive IC makers to comply with the strict quality, reliability, and safety standards set by OEMs and the ISO 26262 standard.
For more, download our white paper IC Test Solutions for the Automotive Market.