My Self-driving Car Should Work Right Every Time

By Stephen Pateras – Mentor, A Siemens Business

I think I speak for us all when I say that strict quality and reliability requirements for safety-related electronics in my car are a great thing…

There has been a rapid increase in the amount and complexity of electronics designed to bring ADAS and autonomous driving capabilities to passenger cars. In fact, hundreds of semiconductor devices, including the ICs needed to execute artificial intelligence algorithms that govern emerging self-driving capabilities, are now being integrated into higher-end vehicles. These devices must meet the ISO 26262 functional safety standard and the entire electronics industry is responding.

My corner of the automotive electronics safety issue involves making sure the ICs have advanced self-test and monitoring capabilities. This means that all the electronics fully and correctly test themselves during power-up and also perform periodic tests while the car is in operation. The goal is to have no sudden failures in safety-related features of the car.

These requirements present many challenges, like meeting necessary fault coverage metrics (i.e. being thorough), maintaining periodic testing without adversely affecting the performance of the car (i.e. being efficient), and achieving a system-wide test strategy that is compatible with a wide range of system architectures (i.e. being flexible).

Mentor has a new generation of test solutions to address these evolving challenges, both for ensuring very high quality test of ICs after manufacturing and for robust self-test once the IC is packaged and deployed in your car.

Testing during functional operation is achieved through the Tessent MissionMode architecture, which provides system-level low latency access to all on-chip test resources for on-line test and diagnosis. The hierarchical network of SIB (scan insertion bit) switches allows for versatile and efficient communication to various embedded test resources. An IEEE 1149.1 TAP (test access port) provides external access to the IJTAG network and is primarily used within the manufacturing test environment. At the heart of this architecture is the Tessent MissionMode controller which can take over the TAP signals and drive any test or diagnostic commands to any and all of the test resources in the IJTAG network. The MissionMode controller can either use preloaded test sequences or get new instructions from a service processor through any vehicle bus like a CAN (Controller Area Network) or I2C (Inter Integrated Chip).

IJTAG-Based Tessent MissionMode Architecture


For devices that require very reliable memory (think image sensors for self-driving), the MissionMode controller enables non-destructive memory BIST. This non-destructive test allows memory to be continuously tested while the device is operating. You can read details about it in a new whitepaper Test Solutions for the Automotive Market.

Logic BIST is another popular form of in-system test that can be accessed through the MissionMode controller. A recent improvement allows logic BIST to be integrated with ATPG compression in a hybrid test setup that reduces the chip area because the hybrid solution shares on-chip DFT resources between the two test strategies.

Of course, before getting to the in-field self-test capabilities, you should first make sure to weed out any chips with hidden defects at the manufacturing stage. The existing methods for testing digital circuits have been stressed with the move to smaller process geometries. There are newer methods that are much more effective at finding all the defects in a device, whether in the interconnect or inside the transistors. This is an important distinction for devices that use FinFET transistors.  Using this cell-aware test greatly improves defect detection.

So far, I’ve only mentioned the digital parts of ICs, but most field failures in automotive devices occur in the mixed-signal portion of the chip. As rare as these are, they cannot be tolerated in a safety-critical automotive application, which is why Mentor developed a new solution to improve mixed-signal test. To automate the generation of analog tests, you need to know the fault coverage achieved by any test. We do that through Tessent DefectSim, the first commercial fault simulator for analog circuits. This new automation allows existing analog tests to be evaluated for their effectiveness so you can eliminate tests that aren’t useful and generate new ones that are.

Get details on our analog fault simulation from our whitepaper Part 1: Analog Fault Simulation Challenges and Solutions.

The electronic content of cars is increasing rapidly and much of it must meet hardware functional safety requirements. The first step is to not let any defective parts into the wild in the first place by using transistor-level test and improving analog tests. Once in operation, Tessent MissionMode provides the electronic oversight necessary to ensure your car gets you to your destination in one piece.


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This article first appeared on the Siemens Digital Industries Software blog at