Uncovering 2.5D and 3D IC Tests – ep. 8
One of the best ways to speed-up product development is to integrate test as early as possible in the design cycle. This shift-left strategy becomes even more critical when advanced IC designs evolve from a single die per package to complex systems with multiple dies integrated into a package. These 2.5D and 3D multi-die design strategies pose some interesting challenges and opportunities for test.
Today, David Lyell interviews Joe Reynick, the Tessent Product Engineering Manager for Siemens EDA. He’ll help us to understand the complexity of development tests for 3D and 2.5D packages.
In this episode, you’ll learn about the challenges of performing comprehensive tests on 3D and 2.5D designs. You’ll also hear about the factors that you need to consider while planning for 3D DFT and IP tests. Additionally, you’ll find out how 2.5D tests and 3D tests can complement each other.
What You Will Learn In This Episode:
- The things you need to be aware of when doing 2.5D and 3D tests (03:34)
- The DFT and IP test methods that the DFT and IP test team should implement (09:36)
- The die and package level planning interactions needed for 3D DFT and IP test (11:22)
- Factors to consider while doing 3D tests (14:20)
- What is involved in multi-die IP core test (16:00)
3D IC
Three-dimensional integrated circuits take less space and deliver higher performance.
Listen on:
