Breaking down 50 million pins: A smarter way to design 3D IC packages
How do you design and verify a package with tens of millions of pins — without losing months to manual rework?
In this episode of the Siemens 3D IC Podcast, host John McMillan speaks with Per Viklund, director of IC packaging and RF product lines at Siemens EDA, about the growing challenge of managing chiplet and interposer complexity in advanced 3D IC designs.
Per explains how hierarchical device planning enables designers to work at the right level of abstraction, streamlining the creation, optimization, and verification of massive, high-pin-count packages. The discussion covers why spreadsheet-based methods no longer cut it, the risks of unsynchronized workflows, and how early, multi-domain analysis can prevent costly late-stage redesigns.
The episode also introduces Siemens’ Innovator 3D IC portfolio — a unified, AI-infused solution designed to support the entire packaging workflow, from early planning through final layout, with built-in data management to eliminate version errors.
Ideal for IC packaging engineers, 3D IC architects, chiplet designers, substrate fabricators, and verification professionals working on high-complexity designs.
What you’ll learn…
- Current changes in IC packaging and the impact on the whole ecosystem (01:50)
- How to manage complexity scaling (03:00)
- What hierarchical device planning is and why it matters (03:35)
- How traditional methods fall short for high-pin-count designs (05:00)
- The risks and consequences of package assembly errors (06:20)
- What next-gen tools must deliver for designers (07:00)
- Siemens’ Innovator 3D IC Portfolio overview (09:10)
Per Viklund
Per Vikund is Systems Architect Director at Siemens EDA, responsible for IC packaging and RF/microwave product strategy and technology. He has more than 40 years of experience with electronic design and EDA and has spect the past 39 years focusing on high-density advanced packging (HDAP) and RF/microwave design solutions.
3D IC
3D IC is the future of IC packaging. Learn with us how to prepare for it.
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