SemiEngineering: Speeding Up AI With Vector Instructions

By nileshthiagarajan

Excerpt from article: “Speeding Up AI With Vector Instructions”

SoC designers get these benefits for free, as it is contained inside the CPU. “It typically doesn’t directly touch the outside of it, so from a hardware designer’s perspective, if they’re including a CPU that happens to have vector extensions or not, it’s essentially the same to them,” noted Russell Klein, HLS platform program director at Siemens EDA.

Read the entire article on SemiEngineering originally published on November 4th, 2020.

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This article first appeared on the Siemens Digital Industries Software blog at