Low power multicore from a software designer’s perspective

After talking about low power CPU modes last week, I make no apology for returning to the topic. Reducing power on a single core embedded system is a challenge. With a multicore design, there are many other nuances. As with most system development, there are two highly interrelated facets to the process: design and verification [which software developers commonly call debugging].

Different semiconductor vendors have different ideas on how to build such systems …

Some months ago, I posted about ARM’s big.LITTLE approach. Broadly, the idea is that the CPUs in a multicore systems are instantiated in pairs. Each CPU of the pair is a different architecture – though both ARM, obviously – one has high computational power and the other is designed to be more power efficient. Code is run on the appropriate CPU according to the power budget of the moment.

Imagination Technology Group [who you might recall acquired MIPS a while back] have an alternative approach, which I read about in this article. They regard big.LITTLE as unnecessarily complex, as it involves two CPU architectures. They propose a design where the CPUs are all identical in architecture, but some are instantiated to operate at a high voltage/frequency and deliver performance and others are configured for low power. Again, the code runs on a CPU appropriate to the current power budget.

I cannot say which of these is best from the chip designer’s viewpoint [as I am not a chip designer!], however, I think there would be little to choose between them from a purely [application] software perspective. System level software would, I guess, be slightly simpler using Imagination’s approach.

In either case, the software developer has a challenge – figure out what is happening across multiple cores, while keeping a careful eye on the power consumption. I think another commercial for Mentor Embedded’s Sourcery Analyzer is in order. It is hard to imagine a better tool for the job.