Best-in-class Transient Noise analysis for complex circuits

By Lih-Jen Hou and Pradeep Thiagarajan

Semiconductor designs continue to advance with complex cutting-edge technologies. Nvidia recently revealed several pivotal industrial trends during their GTC conference in Santa Clara. This included the introduction of their next generation GPU called Blackwell, purpose-built to handle high-volume computing demands for AI applications in the years ahead. They showcased cutting-edge AI modules and kits meticulously crafted to assist in the development of robot arms. Furthermore, Nvidia announced a collaboration with Apple, integrating instant cloud computing into Apple’s latest product, Vision Pro. This technology promises immersive spatial experiences for users and has applications beyond consumer use, including autonomous driving and industrial automation. Achieving such technical feats requires powerful computing chips packed with a tremendous amount of functionality.

Foundries continue to invent advanced semiconductor processes with smaller transistor geometries for better power, performance and area (PPA). The Gate-All-Around technologies from TSMC, Samsung, Intel and Rapidus provide a new pathway for IC companies to further miniaturize their chips for more functionality.

However, the increased transistor density also introduces design complexity with an explosion of signals in a congested space, whereby device noise and unintended coupling become serious issues. In addition to higher transistor count, the inherent parasitic resistance and capacitance become more pronounced, and lower supply voltages make signals more susceptible to noise. Hence, performing transient simulations with injected noise to emulate real-world scenarios becomes a daunting challenge:

Extremely time-consuming process.
Complex setting to fulfill the actual requirements without exceeding necessary specifications.
Lack of guidance to proceed post-processing toward the specific circuits.

Siemens EDA provides cutting-edge verification technology with foundry certified Analog FastSPICE (AFS) platform for custom IC design of analog, mixed-signal, RF, memory and custom digital circuits. Transient Noise analysis is a must-have capability in every IC designer’s playbook to ensure noise impact on designed circuits is well understood, so the design can be made robust.

We have formulated a white paper that showcases AFS Transient noise analysis that is SPICE accurate and provides high simulation run time performance. Further, we discuss how the latest AFS eXTreme technology enhances the simulation performance along with embedded functions, including AFS Transient Noise Quick Start documentation, Solido Waveform Analyzer, DNA (Device Noise Analysis) Advisor.

The white paper, titled “High-Performance Silicon-Accurate Transient Noise Simulation with Analog FastSPICE eXTreme Technology” is intended to serve as a valuable resource for circuit designers.

In the paper, we discuss the following: