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All Thought Leadership
Chris Spear
Class Variables and $cast
August 5, 2021
Introduction My previous post showed how SystemVerilog class variables can refer to base and derived objects. This post shows you...
By Chris Spear
< 1
MIN READ
Class Variables and Assignments in SystemVerilog
July 12, 2021
Introduction Good OOP style says you should start your project with a common base class (or several). When you want...
By Chris Spear
< 1
MIN READ
Runtime checks with the $cast() method
June 28, 2021
Introduction Verilog was always known for its lack of type checking, treating everything as just bits strung together into vectors...
By Chris Spear
< 1
MIN READ
Verification Class Categories
June 21, 2021
Introduction What can you describe with Object-Oriented Programming? When I learned OOP, we had cute classes like animals, cars, and...
By Chris Spear
< 1
MIN READ
SystemVerilog Class Variables and Objects
June 14, 2021
Introduction How can you visualize the relationship between classes and objects in SystemVerilog? This is the first post in a...
By Chris Spear
< 1
MIN READ
Getting Started with Questa Verification IP for Protocols
February 18, 2021
The best way to create a System on a Chip is with design IP: blocks that perform common functions such...
By Chris Spear
< 1
MIN READ