Portable Stimulus (and Other Standards) at DAC
We’re about to embark on my favorite (professional) time of the year! That’s right, the 55th Design Automation Conference is right around the corner. And aside from the annual opportunity to reconnect with friends and colleagues (and many who are both), I can tell you that this is going to be a big week for those of us who are involved in Standards development, particularly the impending Portable Stimulus Standard from Accellera.
We are eagerly anticipating a Major Milestone in Portable Stimulus, an effort that began over four years ago when Mentor started the standardization process in Accellera. It’s been a long but rewarding process that has culminated thus far in the Working Group approving the release of the Portable Stimulus 1.0 Draft Standard to the Accellera Board of Directors for their approval, which we are hoping will come on Tuesday.
In anticipation of the release of this fully armed and operational battle station standard, I will be kicking off a full slate of presentations in our Verification Academy booth (#1622) with “Portable Stimulus: A New Hope” at 10am on Monday morning. Come for the presentation and stay for the week. We’ll be having great presentations every hour on the hour.
Accellera will be sponsoring a (free) breakfast presentation on Tuesday morning where you’ll learn about the key initiatives going on in standardization. In addition to Portable Stimulus, the SystemC CCI Working Group is just releasing its 1.0 standard, and the IP Security Assurance Proposed Working Group will be discussing standards development to address security of IP. All you have to do is register and then get up a little early (breakfast starts at 7am) and I promise you it will be worth it.
As the conference is winding down on Wednesday afternoon, I’ll be stirring things up again with a panel in the IP Track: Portable Stimulus: Design and Verification [R]Evolution, where the other panelists and I will discuss with the audience what the impact of Portable Stimulus will be on design and verification IP, explore the opportunity PSS provides to bring design engineers more into the verification process, and consider the possibility of verification engineers and embedded software developers actually using the same tool.
Oh, I almost forgot. The other big thing coming from Accellera this week is the new Reference Implementation for the IEEE 1800.2 UVM standard. We’re calling it v0.9 because there’s still a bit of documentation we want to provide, but the library itself is complete and fully functional. It includes all of the 1800.2 API, which is of course documented in the standard, and also has a substantial amount of debug and other useful functionality that goes beyond (without contradicting) anything in 1800.2. For the most part, these extensions are there because previous users found them helpful, so if you’ve used them before they won’t be hard to figure out even before the official 1.0 documentation comes out.
Remember, please stop by the Verification Academy booth (#1622) and say hi. I hope to see you there.
