Excerpt from article: “Determining Where Power Analysis Matters Most”
Getting more granular with power
Krishnaswamy noted that RTL power vs. gate power accuracy is a key concern in many designs. Front-end power tools are meant to bridge the gap between RTL power and sign-off numbers by accounting for physical effects, such as clocks and wire capacitance, while delivering 20X faster turnaround time when compared to traditional gate-level methodologies. This enables designers to identify and make power decisions early and reliably.
But power estimation accuracy may not be needed during the early stages of RTL design, and this is where things get less clear-cut. “The required input such as SPEF and waveform data for accurate power estimation may not be available,” said Neeraj Joshi, director of engineering at Siemens EDA. “At this stage, RTL designers are more interested in trending and tracking power metrics with each RTL revision. Also, during early RTL development new functionality may be added to the design, and based on the power budget for each block the RTL designer might want to reduce power at the same time.”
Read the entire article on SemiEngineering originally published on August 8th, 2019.