lisa.hartman@siemens.com
Veloce Cloud Capacity

Veloce Cloud Capacity

January 12, 2026
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 2</span> <span class="rt-label rt-postfix">minutes</span></span>Capacity at your fingertips  — A flexible, scalable, turnkey solution for cloud access to Veloce emulation capacity. Veloce Cloud Capacity provides...
By lisa.hartman
< 1 MIN READ
From electric telegraphs to FPGA prototyping: Siemens’ journey of innovation

From electric telegraphs to FPGA prototyping: Siemens’ journey of innovation

November 13, 2025
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 3</span> <span class="rt-label rt-postfix">minutes</span></span>Growing up in Germany in the 1960s, the name Siemens was everywhere. It stood for reliability, innovation, and quality whether...
By lisa.hartman
< 1 MIN READ
FPGA-based prototyping – to build, or to buy, that is the question!

FPGA-based prototyping – to build, or to buy, that is the question!

March 14, 2025
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 2</span> <span class="rt-label rt-postfix">minutes</span></span>Almost as long as FPGAs have been around, they have been used to prototype ASICs, SoCs, and IPs. While initially,...
By lisa.hartman
< 1 MIN READ
Multi-FPGA Partitioning – What’s the Recipe for Success?

Multi-FPGA Partitioning – What’s the Recipe for Success?

January 28, 2025
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 2</span> <span class="rt-label rt-postfix">minutes</span></span>Multi-FPGA partitioning has undergone significant advancements over the years, driven by the increasing complexity of digital systems and the need...
By lisa.hartman
< 1 MIN READ
Revolutionizing Debugging with Veloce proFPGA CS: Unleashing Full Visibility with the First FPGA VP1902 Powered Software Prototyping Systemtest

Revolutionizing Debugging with Veloce proFPGA CS: Unleashing Full Visibility with the First FPGA VP1902 Powered Software Prototyping Systemtest

December 12, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 2</span> <span class="rt-label rt-postfix">minutes</span></span>The semiconductor industry is witnessing an exciting breakthrough with the introduction of Veloce proFPGA CS, the first VP1902 FPGA-based software...
By lisa.hartman
< 1 MIN READ
FPGA-based prototyping – from “do it yourself’ to an essential SoC verification and system validation tool

FPGA-based prototyping – from “do it yourself’ to an essential SoC verification and system validation tool

October 16, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 3</span> <span class="rt-label rt-postfix">minutes</span></span>FPGA-based prototyping has always been something of an assembly-required construction kit. Consequently, getting to a functional and usable prototype took...
By lisa.hartman
< 1 MIN READ
Accelerating your simulation runs. Bridging the simulation and emulation gap using Veloce sim-accel methodology

Accelerating your simulation runs. Bridging the simulation and emulation gap using Veloce sim-accel methodology

October 2, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 3</span> <span class="rt-label rt-postfix">minutes</span></span>Welcome to the world of Siemens Hardware Assisted Verification (HAV) engines, a fast-paced verification ecosystem that synthesizes the design, and...
By lisa.hartman
< 1 MIN READ
Supercharge Your HAV Investment with Veloce ES (Enterprise Server) App

Supercharge Your HAV Investment with Veloce ES (Enterprise Server) App

September 19, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 3</span> <span class="rt-label rt-postfix">minutes</span></span>In today’s fast-paced world of hardware design and verification, accelerating time-to-market and optimizing resources are paramount. Hardware-Assisted Verification (HAV) significantly...
By lisa.hartman
< 1 MIN READ
The Veloce Ecosystem: Applications Targeted to Solving End User Challenges

The Veloce Ecosystem: Applications Targeted to Solving End User Challenges

September 5, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 3</span> <span class="rt-label rt-postfix">minutes</span></span>In the rapidly evolving semiconductor and electronic design world, hardware-assisted verification (HAV) has become an indispensable part of the design process. The use...
By lisa.hartman
< 1 MIN READ
The Rise of Custom Acceleration

The Rise of Custom Acceleration

August 22, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 3</span> <span class="rt-label rt-postfix">minutes</span></span>A trend sweeping through chip design is changing the traditional markets for CPUs and GPUs. Along the way, it is...
By lisa.hartman
< 1 MIN READ
Facing a New Age of IC Design Challenges Part 2

Facing a New Age of IC Design Challenges Part 2

August 8, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 4</span> <span class="rt-label rt-postfix">minutes</span></span>In an industry accustomed to incremental change, Veloce CS is a departure because it is a complete three-in-one system, a...
By lisa.hartman
< 1 MIN READ
Facing a New Age of IC Design Challenges Part 1

Facing a New Age of IC Design Challenges Part 1

July 25, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 3</span> <span class="rt-label rt-postfix">minutes</span></span>In an industry accustomed to incremental change, Veloce CS is a departure because it is a complete three-in-one system, a...
By lisa.hartman
< 1 MIN READ
The Strategic Advantage in the Hardware-Assisted Verification Segment

The Strategic Advantage in the Hardware-Assisted Verification Segment

July 12, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 3</span> <span class="rt-label rt-postfix">minutes</span></span>Welcome to the Siemen hardware-assisted verification group blog. Technologies in this group include software-based tools for architectural design and verification,...
By lisa.hartman
< 1 MIN READ