Article RoundUp: Master the design and verification of next gen transport: Series – Overview, High-Level Synthesis, Functional Safety, Emulation
- Master the design and verification of next gen transport: Part One – Overview
- Master the design and verification of next gen transport: Part Two – High-Level Synthesis
- Master the design and verification of next gen transport: Part Three – Functional Safety
- Master the design and verification of next gen transport: Part Four – Emulation
Master the design and verification of next gen transport: Part One – Overview
TechDesignForums
HLS essentially separates functionality from implementation, making it faster and more productive – thus allowing easier rework as functionality is added or extended according to standards or the designer’s proprietary goals. This article is the first in a four-part series that addresses how high-level synthesis (HLS) and emulation contribute together with reference to other tools within a complete flow. Furthermore, the role of emulation in the context of automotive challenges, solutions and the overall idea of the digital twin is highlighted.
Master the design and verification of next gen transport: Part Two – High-level Synthesis
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This article explains how high-level synthesis (HLS) can be used for design exploration and verification & is primarily based on a demonstration using the Tiny YOLO convolutional neural network (CNN) for object classification.
The article looks at two cases where HLS (with emulation) can help deliver complex transportation-type projects more efficiently than through the use of traditional flows using hand-coded RTL.
Master the design and verification of next gen transport: Part Three – Functional Safety
TechDesignForums
The Failure Mode Effects and Diagnostic Analysis (FMEDA) required within ISO 26262 involves the generation of estimated (analytical) and proven (verified) metrics. The overall functional safety workflow leverages extensive automation and uses a range of tools from Mentor, a Siemens Business. This article highlights the three main stages of the process workflow that should reduce systematic and random faults to a standard-compliant level.
Master the design and verification of next gen transport: Part Four – Emulation
TechDesignForums
Next gen verification plan is based on the verification of five ECU systems (dashboard, engine control, transmission control, braking, automated driver assistance control) in a holistic digital twin. TASS Prescan, Veloce & Amesim interact with one another directly and in a loop to provide a continuous ‘digital twin’ simulation during an extended driving scenario. Emulation at the system-of-systems level is the focus of the fourth and final part of this series on the design and verification of next generation transportation systems.
