Article Roundup: Closing Coverage with HLS, Smart AI DFT, Portable Stimulus and You, Automotive IC Reliability & Deep Learning in Semiconductors
- Closing code coverage with a hardware-aware HLS-to-RTL flow
- How to be Smart About DFT for AI Chips
- Verification’s Next Steps: Portable Stimulus and You
- Chasing Reliability In Automotive Electronics
- Deep Learning in the Semiconductor Space
Closing code coverage with a hardware-aware HLS-to-RTL flow
Tech Design Forum
HLS helps companies reduce design cycles through higher abstraction and faster simulation execution. But, closing code coverage remains a challenge as HLS users frequently have to fall back on tools designed for software code coverage that are not as accurate when applied to hardware definitions. This article examines an HLS flow integrated with RTL simulation to provide hardware-aware code coverage.
How to be Smart About DFT for AI Chips
SemiWiki
Companies are producing specialized chips based on parallel processing to meet the computational needs of AI. As a result, these chips feature a large number of replicated processing units with memory distributed throughout the chip. While these designs tend to be large, DFT engineers can take advantage of certain properties, such as regularity, to reduce DFT, ATPG, and test time.
Verification’s Next Steps: Portable Stimulus and You
EE Journal
Mentor’s Tom Fitzpatrick joins Amelia Dalton on the weekly Fish Fry podcast to discuss the details of the Portable Test and Stimulus Standard. This includes the differences between vertical, horizontal and technique reuse, and Mentor’s push for Accellera to standardize the Portable Test and Stimulus Standard.
Chasing Reliability In Automotive Electronics
SemiEngineering
The reliability needs of automotive electronic components have created ripples across the semiconductor supply chain, highlighting under-defined standards, insufficient data, and varying levels of expertise. In particular, chips designed for compute intensive and safety-critical self-driving applications must be implemented at the most advanced nodes to achieve power, performance, and area requirements. To ensure reliability, increasingly robust post-manufacture testing is needed to keep up with the increased defect densities at the most advanced nodes
Deep Learning in the Semiconductor Space
EE Web
Chris Rowen, CEO and founder of BabbleLabs, recently gave a presentation to a group of semiconductor executives focused on the implications of deep learning in the industry. Rowen highlighted two important implications of deep learning. First, it is a new computing model that describes system functionality differently. Second, it will interact with the cloud and the edge differently. This article presents a summary of Rowen’s talk.
