Article Roundup: Vehicle Networking, Silicon Photonics Verification, EDA Tools for IoT, EUV resolution enhancement & System vs IC Design
- Networking Vehicular Electronics Gets an Assist
- Physical Verification For Silicon Photonics: Don’t Panic!
- Affordable EDA Tools for IoT Designs, Guess which Vendor
- EUV’s arrival demands a new resolution enhancement flow
- Systems Design vs Integrated Circuit Design
Networking Vehicular Electronics Gets an Assist
Automotive Design & Production
SAE J1939 is a higher-layer protocol for in-vehicle communications across a CAN bus in heavy-duty commercial vehicles. With up to six CAN networks in a single vehicle, the design and implementation of vehicle networks has become too complex to be completed manually. New software solutions are required that integrate network and E/E design, enable design reuse, and provide advanced metrics for trade studies.
Physical Verification For Silicon Photonics: Don’t Panic!
SemiEngineering
Silicon photonics speeds up data transmission and reduces power consumption in integrated circuits. This makes it a crucial technology for high-bandwidth and low-power applications such as cloud computing, telecommunications, aerospace, and more. However, photonics IC (PIC) designs introduce new verification challenges and requirements, driving the need for new solutions and processes. This article examines the unique challenges to PIC design and verification, and the solutions that EDA companies are pursuing.
Affordable EDA Tools for IoT Designs, Guess which Vendor
SemiWiki
Designing chips and sensors for IoT devices requires an agile design flow with a low cost of entry. This article features a brief Q&A between Daniel Payne and John Stabenow regarding the Tanner EDA toolset. Payne & Stabenow discuss trends among Tanner customers, new tools, how Tanner supports photonic chip design & more.
EUV’s arrival demands a new resolution enhancement flow
Tech Design Forum
Extreme ultraviolet lithography (EUV) is arriving in high volume manufacturing, presenting unique challenges for existing resolution enhancement technology (RET) flows. In an effort to improve RET, GLOBALFOUNDRIES, IMEC, and Mentor found that sub-resolution assist features (SRAF) can help when teamed with optimization tools, such as inverse lithography. This article examines how SRAFs can be used to enhance RET flows for EUV processes.
Systems Design vs Integrated Circuit Design
SemiWiki
The PCB and systems design market is becoming increasingly important for the EDA industry. In part sixteen of the “20 Questions with Wally Rhines” series, Rhines recounts the evolution of the PCB design and EDA market from the early eighties to today, including how a field-developed product for Freightliner became Capital, the leading system connectivity design environment in the market today.
