Article Roundup: Analog Design Migration, Hardware Emulation Cost of Ownership, IIoT Architectural Considerations, Autonomous Car Safety & Full-Chip Reliability Verification

1. Analog Migration Equals Redesign
2. The Cost of Ownership of Hardware Emulation
3. Architectural considerations for enabling industrial IoT devices
4. Are self driving cars safe?
5. How Reliable Is Your Full-Chip Reliability Verification?

Analog Migration Equals Redesign
Semiconductor Engineering

In the finFET era, migrating analog circuit designs to new process nodes poses a significant challenge for designers, due to a growing number of physical and electrostatic effects. Starting at 180nm, migrating between process nodes has a dramatic impact on the characteristics of the device, and thus the ideal circuit topology. As a result, many engineering teams are forsaking node migration in favor of a more complete re-evaluation and verification of the architecture and design of analog circuitry for the target process node.

The Cost of Ownership of Hardware Emulation
Chip Design

Today’s emulation platforms come in three types: processor-based, custom FPGA-based, and commercial FPGA-based. While the purchase price of each platform certainly varies, the major differences in cost-of-ownership are a result of the various solutions required to install, maintain, power, and cool the different emulators. In this article, Dr. Lauro Rizzatti breaks down the costs related to each emulation platform to determine the true cost of each option.

Architectural considerations for enabling industrial IoT devices
Embedded.com

Cloud vendors offer a variety of infrastructure services to create and manage IIoT devices including secure device onboarding, communications protocols, and data models. These services establish a foundation for device onboarding and communications, but gaps remain. OS/system services, such as the Mentor Embedded IoT Framework, enable life cycle management, system and device health monitoring, software updates and more to fill these gaps and provide a comprehensive IIoT device management solution.

Are self driving cars safe?
Siemens PLM

Recent real-world accidents involving autonomous cars are casting uncertainty on the future of autonomous drive technology. As a result, automakers must develop incredibly safe and reliable systems that can win the trust of wary consumers, regulators, and legislators. Simulation-based verification and validation methodologies will be critical to ensuring the safe operation of level four and five autonomous vehicles as they enable the testing of a wide range of inputs such as SoC design, sensor data, and full vehicle performance.

How Reliable Is Your Full-Chip Reliability Verification?
Chip Design

Advanced nodes are introducing new and complex reliability conditions that cannot be easily or accurately checked using dynamic simulation or traditional physical or circuit verification technology at the full-chip level. A new approach that employs static simulation and static voltage propagation in conjunction with logic-driven layout analysis supports the development of accurate, fast, and automated reliability design verification for ESD, LUP, and TDDB issues. With new reliability verification methodologies and tools, designers can verify that their designs are protected against a wide range of reliability issues, ensuring that the final product provides the performance and lifetime the market demands.