Are you meeting IC power demands for your design?
DC Drop Simulation is more than just being sure you have enough copper on the planes. You should also investigate the following areas during DC drop analysis:
- Are the ICs on the board getting the required voltage at DC?
- Is the current density on the power nets well below the manufacturing guidelines?
- Will the high current density heat the board area and cause annealing and design breakdown?
It’s important to understand the behavior of the planes at DC because ICs tend to draw in large amounts of currents when I/O buffers are not toggling. Voltage drop can occur on power planes due to losses and imperfections of the planes, such as when the plane is too narrow or long or when there is a bottleneck, such as when multiple vias cut through the plane.
Adverse effects of DC drop can be disruptive to normal board functioning. The voltage as seen by the target IC, i.e., the voltage of the IC power pin minus the voltage of the IC GND pin may not be within the IC’s tolerance. This can cause the IC to not work as expected, as shown in the picture below.
High current densities in voltage-island neck downs can create excessive heat which, in turn, reduces board reliability and can cause board failures. Failures on power nets leads to disconnected power on the board.
To understand in detail how to simulate the planes at DC, check out my web seminar, “Managing Split Planes and Power Integrity”
Benefits of using PADS HyperLynx DC Drop:
- Easy to use
- Quickly analyzes voltage drop of power supply rails due to copper losses found in power plane shapes, power traces, and neck downs in dense layouts
- Interactive and batch-mode simulation capability
- Allows easy exploration of different conductor materials and trace thicknesses
- Identifies areas of excessive current density.
