From 2.5D to true 3D IC: What’s driving the next wave of Integration
How do you transition from today’s 2.5D systems into tomorrow’s true 3D IC architectures — while balancing cost, performance, and thermal demands?
In this episode of the Siemens 3D IC Podcast, host John McMillan speaks with Kevin Rinebold, 3D IC packaging and account technology manager at Siemens EDA. With over 35 years of customer-facing experience, Kevin shares insights into the evolution of advanced packaging, chiplet integration, and the methodologies needed for the next wave of 3D IC adoption.
The discussion covers how hyperscalers are driving AI and high-performance compute with 2.5D and emerging 3D approaches, why design enablement remains uneven across the supply chain, and what’s required to balance thermal, power, and signal considerations at scale. Kevin emphasizes that 3D IC isn’t just a technical challenge; it’s an organizational shift toward integrated, cross-disciplinary collaboration.
He also highlights Siemens’ role in enabling customers to “shift left,” evaluate tradeoffs early, and leverage a broad portfolio of tools and expertise to meet the complexity of future 3D IC designs. Looking ahead, Kevin points to maturing chiplet standards, system-on-wafer architectures, and the ongoing battle to get power in and heat out of dense 3D IC stacks.
Ideal for: IC packaging engineers, 3D IC architects, chiplet designers, substrate fabricators, and verification professionals navigating the shift from 2.5D to 3D integration.
What you’ll discover…
- (01:40) Current state of 3D IC adoption: hyperscalers, AI accelerators, and beyond.
- (04:20) 3D VS 2.5D design and (hybrid bonding, stacking, bridges).
- (05:30) Why customers want to learn more about 3D IC design.
- (06:50) Why do customers move over to 3D IC design?
- (08:25) Challenges in 3D IC design.
- (10:20) Methodology shifts: early system-level planning and predictive modeling
- (13:30) Siemens’ broad portfolio, roadmap collaboration, and multi-physics modeling
- (15:45) The 5-year outlook: chiplet standards, system-on-wafer, and power/thermal battles
Kevin Rinebold
Kevin is the technology manager for 3D IC and heterogeneous packaging solutions at Siemens EDA. He has 34 years of experience in defining, developing, and supporting advanced packaging and system planning solutions for the semiconductor and systems markets. He’s pioneered some of the earliest solutions for co-design working closely with customers to adopt and deploy advanced solutions for technologies like FOWLP and 2.5D/3D packaging.
Kevin is a regular contributor and speaker at industry events and has authored numerous articles on planning, design, and verification methodologies for heterogeneous packaging.
Prior to joining Siemens EDA, Kevin was product manager for IC packaging and co-design products at Cadence. He’s held similar positions at Sigrity, Synopsys, and Xynetix.
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