Siemens Digital Industries Software Blog Network

Siemens Digital Industries Software Blogs


Thought Leadership

Enhancing LLM prompts with Keyphrase Trees and hierarchical topic extraction

Discover how Siemens EDA’s novel Keyphrase Trees technique uses hierarchical clustering and advanced AI to transform keyphrase extraction for electronic design automation. Learn how this method improves accuracy, unlocks domain independence, and streamlines information management for chip design teams.

Energy & Utilities

Intern interview & blog: Guillermo Nieves embraces service lifecycle management

Blog post and interview from Guillermo Nieves, summer 2025 intern.

Energy & Utilities

Intern interview & blog: Paul Daumeyer uses Mendix to help develop two robust apps

Blog post an interview from Paul Daumeyer, summer 2025 intern.

Thought Leadership

Enhancing cybersecurity with AI

In a world increasingly dominated by connected machines and technology, cybersecurity is key area that can’t be ignored yet, managing...

Siemens Software Podcast Network

Industrial machinery and AI – Episode 3

In the third episode of industrial machinery and AI series in our Digital Transformation podcast, host Chris Pennington, global industry...

Thought Leadership

Smart manufacturing in a transforming aerospace industry

The types of aircraft and spacecraft being flown are always changing, and in the last few years especially, the world...


NX Design

New Lifecycle Insights analyst report: Advanced design for heavy equipment

Download “Advanced design for heavy equipment: accelerating engineering transformation“ Challenges in heavy equipment manufacturing We’re excited to announce the release...


Verification Horizons

From manageability to 3.0: Unlocking the future with UCIe verification

The semiconductor industry is steadily moving toward multi-die integration, where chiplets from different sources are combined within a single package (known as a system in package or SiP) to deliver higher performance, scalability, and efficiency. The Universal Chiplet Interconnect Express (UCIe) standard is the backbone of this movement, offering a high-bandwidth, low-latency interconnect that enables heterogeneous chiplets to operate as one system. UCIe 3.0 raises the bar once again. By adding higher data rates, runtime recalibration, priority sideband messaging, low-power sideband operation, and circular buffer transport, the standard improves both performance and efficiency. But it also increases verification complexity.

Semiconductor Packaging

Unlock advanced chiplet design success: Discover the Siemens EDA Heterogeneous Integration eBook series

The future of semiconductor innovation is rapidly shifting from monolithic chips to advanced, multi-chiplet architectures. As devices demand greater power,...