Siemens acquires Defacto Technologies: Transforming SoC design with powerful re-use and assembly automation technology
As System-on-Chip (SoC) designs grow more complex, assembling the design and integrating thousands of Intellectual Property (IP) blocks is a complex, time-consuming, and error-prone process. Designers must often manually establish connections between these IPs, create wrappers, and experiment with many different configurations to meet power, physical, and timing requirements. This requires significant effort
and expertise.
Siemens is pleased to announce that we have entered into an agreement to acquire Defacto Technologies, which will bring their best-in-class software for SoC integration automation, including automation for Arm and RISC-V SoCs, to our EDA portfolio of software for IC design.

With Defacto Technologies, we strengthen our ability to help customers automate SoC design creation and establish trusted design flows earlier in the development cycle,” said Tony Hemmelgarn, president and chief executive officer, Siemens Digital Industries Software. “By extending end-to-end continuity across the SoC design lifecycle, we help semiconductor teams manage complexity, improve productivity and make informed design decisions earlier, supporting faster innovation and higher-quality outcomes.”
With Defacto Technologies’ SoC Compiler, digital IC and SoC designers will be able to accelerate integration, verification, and SoCs signoff, as well as rapidly explore power, performance, and area (PPA) tradeoffs. The platform provides powerful features for IP connectivity, RTL editing, refactoring, UPF management, and register & memory map extraction. This provides a productivity boost as well as reducing the risk of integration errors.
SoC Compiler enables the SoC design assembly process with full support of IP-XACT standard in full compliance with RTL files. Several automated design “extraction, packaging and reuse” capabilities are provided. Extraction of the system memory map is also part of the SoC Compiler capabilities.
The joint Arm IP Explorer/SoC Compiler solution is the shortest path from the definition of Arm-based system architecture to implementation and design verification. From Arm-based system architecture definition, the joint solution automatically generates top level RTL, IP-XACT, and UPF, ready for logic synthesis.

Defacto Technologies joins a portfolio of powerful digital design creation and verification solutions.
“Joining Siemens represents an important next step for our organization and our customers,” said Chouki Aktouf, chief executive officer, Defacto Technologies. “This next chapter opens up significant opportunities for our customers by combining our deep expertise in SoC design automation with the breadth of Siemens’ EDA portfolio. Together, we aim to help engineering teams simplify complex workflows, improve productivity, and accelerate innovation across the semiconductor and electronics landscape.”
We are excited to welcome the talented Defacto Technologies team to Siemens. Their expertise will be instrumental in driving the next wave of innovation in SoC integration automation, helping our customers achieve unprecedented levels of productivity and efficiency.
Suggested Links:
Press Release: Siemens to acquire Defacto Technologies to complement its EDA portfolio with automated SoC design creation
Glossary of semiconductor terms (RTL, IP-XACT, UPF etc.): https://www.lamresearch.com/technical-glossary/