Creating Cohesive High-Speed Link Verification through Solido SPICE IBIS-AMI Support
We are now firmly in the AI era! As artificial intelligence penetrates every aspect of our daily lives, its impact on the semiconductor industry is profound. The demand for faster chips and larger memory capacity has intensified dramatically to meet the computational requirements of AI workloads. At the design level, engineers face increasingly complex signal integrity verification challenges for AI-critical circuit elements: high-bandwidth memory (HBM), SerDes interfaces, and next-generation memory architectures. However, a critical bottleneck has emerged—the disconnect between traditional SPICE simulation and IBIS-AMI modeling workflows.
The Challenge: Fragmented Workflow
Traditional design flows trap engineers in a frustrating multi-tool workflow. Designers must simulate SPICE netlists, process S-parameter files and third-party IBIS models in a true-SPICE simulator, then switch to entirely separate solutions for IBIS-AMI verification of equalization behavior. This fragmented approach creates more than just inefficiency—it’s a productivity bottleneck that demands countless iterations to reconcile disparate data formats and modeling approaches, making quality assurance yet another challenge.
Solido SPICE: Unifying the Workflow
Solido™ SPICE, part of Solido Simulation Suite, eliminates this bottleneck by combining SPICE-level accuracy with IBIS-AMI support. For engineers designing high-speed links in AI chips, this means no more jumping between tools or reconciling incompatible data formats.
Key capabilities include:
• Unified verification workflow: Eliminate tool-switching between different simulators and model formats
• SPICE accuracy: Capture full nonlinear effects and I/O buffer behavior with proven simulation technology by Solido SPICE
• Native IBIS-AMI integration: Built-in C/C++ calculations for advanced equalization schemes (CTLE, DFE, CDR)
• Universal model compatibility: Seamlessly process S-parameter NPORT models, traditional IBIS models, and complex transmission line characterizations in a single environment
Whitepaper: Combining IBIS-AMI with Solido SPICE
Want to see how this works in practice? Our whitepaper “Combining SPICE with IBIS-AMI with Solido SPICE” provides detailed insights into how Solido SPICE seamlessly unifies IBIS-AMI modeling with SPICE-level circuit simulation.
The whitepaper includes practical design examples covering high-speed memory interfaces, SerDes applications, and both NRZ and PAM4 signaling implementations to serve as valuable reference material for engineers.
Ready to learn more? Download the whitepaper or explore the full Solido Simulation Suite.
