Achieving High-Quality Simulations with Leading-Edge Samsung Process Technologies
Semiconductor process technology continues to evolve rapidly, driven by diverse applications ranging from high-performance computing to communications to automotive systems—all demanding increasingly smaller, faster, and more efficient chips. As device geometries shrink, transistor gates struggle to maintain control over the device’s on/off states, resulting in leakage currents that compromise overall chip performance.
In response, the industry is shifting from traditional planar (2D) to advanced 3D architectures, including fin field-effect transistor (FinFET) and gate all-around (GAA) fabrication process technologies, that offer the improved performance needed for even the most demanding cutting-edge applications. Besides FinFET and GAA advancements, another semiconductor process technology addressing leakage issues is Silicon-on-Insulator (SOI), where an insulating material is inserted between two layers of silicon, effectively blocking leakage paths from the transistor to the ground.
Samsung Foundry has been at the forefront of these developments, bringing advanced FinFET, GAA, and SOI solutions to market. Building on our long-standing collaboration with Samsung Foundry, we’re excited to announce the recent certification of Solido SPICE for multiple leading-edge Samsung Foundry processes.
Solido SPICE is now certified across Samsung Foundry’s FinFET and GAA fabrication processes, including the foundry’s 14LPU, 14LPP, 8LPP, 5LPE, SF4P/4LPP, SF4/4LPE, SF3(3GAP), SF3P and SF2 technologies. It is also qualified for the FD-SOI 18FDS process technology. Here’s the certification press release: https://newsroom.sw.siemens.com/en-US/samsung-foundry-solido-spice/
Solido™ SPICE is part of the Solido™ Simulation Suite, Siemens’ next-generation SPICE simulation technology, which supports the verification of next-generation analog, mixed-signal, RF, memory, library IP and 3D-IC semiconductor designs. These new certifications for Samsung’s cutting-edge process technologies enable designers to conduct comprehensive SPICE-level verification with confidence for complex ICs.
Solido SPICE provides a 2-30X speedup for analog, mixed-signal, RF and 3D IC verification. With newer convergence, cache efficient algorithms, and high multi-core scalability, Solido SPICE provides a significant performance boost for large pre- or post-layout designs. RF IC developers can directly benefit from Solido SPICE’s new RF verification capabilities, while 2.5D, 3D and memory interface developers can now experience an efficient capability for full channel transceiver verification that includes equalization, drastically reducing interface assumptions and accelerating verification.
To learn more about Solido Simulation Suite, visit: https://eda.sw.siemens.com/en-US/ic/solido/simulationsuite/
