This year\u2019s DVCon is set and if you have not yet registered, you can do it now \u2013 or just show up!\u00a0 If you want to secure seating at some of the Monday tutorial events, I strongly encourage pre-registration to ensure you can secure a seat.\u00a0 And if you just want to see the exhibits and chat with suppliers, that\u2019s free.<\/p>\n
The IEEE low power format is set to close on its current round standardization shortly and DVCon is a great place to learn all about it from the experts.\u00a0 Harry Foster will update the DVCon attendees on design and verification trends over lunch on Tuesday and later that afternoon, Mentor CEO, Wally Rhines will offer this year\u2019s DVCon keynote.\u00a0 His keynotes are always insightful and entertaining.\u00a0 And if you want to catch me, you can find me with the Mentor staff at the Mentor exhibit booth.\u00a0 Or just follow @dennisbrophy<\/a> on Twitter and I will share info on paper presentations and other happenings.\u00a0 For more details on the events mentioned above, see below.\u00a0 For more information DVCon in general, visit the website at www.dvcon.org<\/a>.<\/p>\n Monday | February 25th | 1:30pm – 4:30 | Fir Ballroom The past few years, the IEEE P1801\u2122 (Unified Low Power \u2013 UPF) Working Group has been busy working on an update to the industry\u2019s standard for low power design, verification and implementation.\u00a0 Accellera has brought together experts from many EDA tool suppliers and users for this tutorial.\u00a0 Attendees can expect to gain a detailed understanding of of the IEEE standard (concepts, terminology & features) as well as an understanding of the practical aspects to apply UPF in real world flows.<\/p>\n The following experts will be help you learn about the new standard \u2013 and will be available to interact with at the conclusion of the tutorial.<\/p>\n
\n
\nLow Power Design, Verification, and Implementation with IEEE 1801\u2122 UPF\u2122<\/em><\/strong><\/p>\n