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<\/a>For some time now a dedicated group of engineers have defined and standardized an important update to the VHDL standard.\u00a0 Also know as IEEE Std. 1076\u2122-2008<\/a>, this update to VHDL took an interesting path to get to where it is today.\u00a0 The VHDL standards team started the standards development work in the IEEE but sought additional input and standards project funding from industry.\u00a0 Accellera provided a good venue in which to get industry input and feedback for an update to the VHDL standard along with funding.\u00a0 Once industry input was taken into account, the proposed update to VHDL, approved by Accellera, was returned to the IEEE for official standards ratification and ongoing maintenance.\u00a0 Jim Lewis, the IEEE VHDL Working Group Chair, points out this is the greatest update to VHDL since VHDL 93.\u00a0 And I agree.\u00a0 Jim is also the subject matter expert for the VHDL-2008 course modules on Verification Academy mentioned in this blog.<\/p>\nVerification Academy Modules<\/h3>\n
As part of my role in international standardization as co-convenor of the IEC TC 93 WG2 (now known as IEC TC 91 WG 13) and in keeping with the IEEE\/IEC dual-logo agreement, I helped complete the dual logo process for this version of VHDL in 2011.\u00a0 VHDL-2008 is also now known as IEC<\/em><\/a> 61691-1-1-2011 \u2013 Behavioural languages \u2013 Part 1-1: VHDL Language Reference Manual<\/em>.\u00a0 I think we can all agree that that name<\/em> is a bit much that we can simply call it VHDL-2008.<\/p>\n With this round of standardization complete, the VHDL-2008 course modules arrive just as complete support for VHDL-2008 emerges here at Mentor Graphics in our ModelSim and Questa products.<\/p>\n I encourage and invite VHDL users to get acquainted with VHDL-2008 via the seven course modules on Verification Academy<\/a>.\u00a0 Verification Academy \u201cFull Access\u201d membership is required.\u00a0 And it is easy to sign up<\/a> (certain restrictions apply).\u00a0 For a quick look at what the courses offer, the introduction page found here<\/a> will show you more details about the following modules.<\/p>\n![\"VHDL](\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2013\/01\/VHDL-2008.jpg\")
<\/a>In less than an hour and half – over 7 course modules – Jim will layout out the additions and changes to VHDL-2008 to simplify the language and extend it to address more of your pressing design and verification challenges with the addition of reusable data structures, simplified RTL coding and the inclusion of fixed and floating point math packages.<\/p>\n