{"id":6656,"date":"2012-09-10T08:00:27","date_gmt":"2012-09-10T15:00:27","guid":{"rendered":"https:\/\/blogs.mentor.com\/verificationhorizons\/?p=6656"},"modified":"2026-03-27T08:43:38","modified_gmt":"2026-03-27T12:43:38","slug":"ovm-gets-connected","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2012\/09\/10\/ovm-gets-connected\/","title":{"rendered":"OVM Gets Connected"},"content":{"rendered":"

OVM Bridges SystemVerilog and SystemC Languages<\/h3>\n

When UVM Connect<\/a> was first released, the multilingual connection between IEEE Std. 1800\u2122<\/a> (SystemVerilog) and IEEE Std. 1666\u2122<\/a> (SystemC) standards bridged the two languages to allow design and verification engineers to access UVM from SystemC or SystemVerilog to exploit native languages advantages.\u00a0 OVM users wondered if it was possible to support them as well since OVM is a derived from UVM.<\/p>\n

It is possible and UVM Connect has been extended to allow OVM users to enjoy the same benefits.\u00a0 An update to UVM Connect now allows it to be compiled to run with the OVM.\u00a0 And since the extensions are based on IEEE standards, they can be used in your simulator of choice.<\/p>\n

OVM Thrives<\/h3>\n

The thriving OVM community is of no surprise.\u00a0 Last year, Harry Foster blogged<\/a> about research on the use and adoption of verification methodologies.\u00a0 The research was done after UVM was established as an Accellera standard, and showed OVM continued its leading position as shown in one of the charts from Harry\u2019s blog (see below).\u00a0 The chart even showed OVM was predicted to have a modest growth in adoption as well.<\/p>\n

\"\"<\/a><\/p>\n

Mentor continues to bring many of the UVM additions back to the OVM user community in a way that does not disturb the upgrade path from OVM to UVM.\u00a0 The major addition to UVM in the first round of Accellera standardization was the addition of a register and memory package.\u00a0 This was back ported to OVM.\u00a0 (The OVM register and memory kit can be found here<\/a>, if you are interested.)\u00a0 Now, UVM Connect has been extended to provide full OVM use.<\/p>\n

Download<\/h3>\n

The UVM Connect 2.2 kit supports multilingual use of OVM and can be found at the Verification Academy<\/a> and the Accellera UVM World contributions<\/a> download site.<\/p>\n

If you find issues or have other suggestions that we should consider, you can always share your input at the OVM Forum<\/a> or UVM Forum<\/a>.\u00a0 In addition to interacting with other users, the Verification Academy<\/a> is a good site for online resources like the UVM\/OVM Cookbook, basic and advanced OVM\/UVM training, and more.<\/p>\n","protected":false},"excerpt":{"rendered":"

OVM Bridges SystemVerilog and SystemC Languages When UVM Connect was first released, the multilingual connection between IEEE Std. 1800\u2122 (SystemVerilog)…<\/p>\n","protected":false},"author":71541,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[309,313,326,528,605,606,623,732,749,751,787,792],"industry":[],"product":[],"coauthors":[],"class_list":["post-6656","post","type-post","status-publish","format-standard","hentry","category-news","tag-309","tag-313","tag-accellera","tag-ieee","tag-multilanguage-ovm","tag-multilanguage-uvm","tag-ovm","tag-standards","tag-systemc","tag-systemverilog","tag-uvm","tag-uvm-connect"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/6656","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/users\/71541"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/comments?post=6656"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/6656\/revisions"}],"predecessor-version":[{"id":14619,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/6656\/revisions\/14619"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media?parent=6656"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/categories?post=6656"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/tags?post=6656"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/industry?post=6656"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/product?post=6656"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/coauthors?post=6656"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}