{"id":6428,"date":"2012-07-20T11:49:51","date_gmt":"2012-07-20T18:49:51","guid":{"rendered":"https:\/\/blogs.mentor.com\/verificationhorizons\/?p=6428"},"modified":"2026-03-27T08:43:41","modified_gmt":"2026-03-27T12:43:41","slug":"verification-academy-up-close-personal","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2012\/07\/20\/verification-academy-up-close-personal\/","title":{"rendered":"Verification Academy: Up Close &amp; Personal"},"content":{"rendered":"<h3>Live &amp; In-Person at DAC 2012!<\/h3>\n<p><a href=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2012\/07\/DAC-2012-4.jpg\"><img loading=\"lazy\" decoding=\"async\" style=\"margin: 0px 4px;padding-left: 0px;padding-right: 0px;float: right;padding-top: 0px;border-width: 0px\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2012\/07\/DAC-2012-4_thumb.jpg\" alt=\"DAC 2012 4\" width=\"240\" height=\"196\" align=\"right\" border=\"0\" \/><\/a>Verification Academy, the brain child of Harry Foster, Chief Verification Scientist at Mentor Graphics, was live from the Design Automation Conference tradeshow floor this year.\u00a0 Harry is pictured to the right giving an update on his popular verification survey from the DAC tradeshow floor.<\/p>\n<p>The <a href=\"http:\/\/www.verificationacademy.com\" target=\"_blank\" rel=\"noopener noreferrer\">Verification Academy<\/a>, predominantly a web-based resource is a popular site for verification information with more than 11,000 registered members for <a href=\"http:\/\/verificationacademy.com\/forum\" target=\"_blank\" rel=\"noopener noreferrer\">forum<\/a> access on topics ranging from <a href=\"http:\/\/verificationacademy.com\/forum\/verification-methodology-discussion-forum\/ovm-forum\" target=\"_blank\" rel=\"noopener noreferrer\">OVM<\/a>\/<a href=\"http:\/\/verificationacademy.com\/forum\/verification-methodology-discussion-forum\/uvm-forum\" target=\"_blank\" rel=\"noopener noreferrer\">UVM<\/a>, <a href=\"http:\/\/verificationacademy.com\/forum\/verification-methodology-discussion-forum\/systemverilog-and-other-languages-forum\" target=\"_blank\" rel=\"noopener noreferrer\">SystemVerilog<\/a> and <a href=\"http:\/\/verificationacademy.com\/forum\/verification-methodology-discussion-forum\/ams-forum\" target=\"_blank\" rel=\"noopener noreferrer\">Analog\/Mixed-Signal<\/a> design.\u00a0 The popular <a href=\"http:\/\/verificationacademy.com\/uvm-ovm\" target=\"_blank\" rel=\"noopener noreferrer\">OVM\/UVM Cookbook<\/a>, which used to be available as a print edition, is now a live online resource there as well.\u00a0 A whole host of <a href=\"http:\/\/verificationacademy.com\/course-modules\" target=\"_blank\" rel=\"noopener noreferrer\">educational modules<\/a> and <a href=\"http:\/\/verificationacademy.com\/resources\/seminars\" target=\"_blank\" rel=\"noopener noreferrer\">seminars<\/a> can also be found there too.<\/p>\n<p><a title=\"Harry Discusses Verification Academy with Luke (Flash Required)\" href=\"http:\/\/www.mentor.com\/products\/fv\/multimedia\/player\/harry-foster-at-dac-2012-0e19fdf7-8729-4396-a345-091832ac2ac8\" target=\"_blank\" rel=\"noopener noreferrer\"><img decoding=\"async\" style=\"margin: 0px 5px 0px 0px;float: left\" src=\"http:\/\/cache.mentor.com\/mentor2\/images\/mm\/generated\/dac2012-hotseat-harry-foster_0e19fdf7.jpg\" alt=\"\" align=\"left\" \/><\/a>If you know about the Verification Academy, you know all about\u00a0 the content mentioned above and that there is much more to be found there.\u00a0 For those who don\u2019t know as much about it, Harry took a break from the being at the Verification Academy booth at DAC to discuss the Verification Academy with Luke Collins, Technology Journalist, <a href=\"http:\/\/www.techdesignforums.com\/\" target=\"_blank\" rel=\"noopener noreferrer\">Tech Design Forum<\/a>.\u00a0 (Flash is required to watch Harry discuss Verification Academy with Luke.)<\/p>\n<p>The Verification Academy at DAC was a great venue to connect in person with other Verification Academy users to discuss standards, methodologies, flows and other industry trends.\u00a0 Each hour there were short presentations by Verification Academy members that proved to be a popular way to start some interesting conversations.\u00a0 While we realize not all Verification Academy members were able to attend DAC in person, we know many have expressed an interest to some of the presentations.\u00a0 Verification Academy \u201cTotal Access\u201d members now have access to many of the presentations.<\/p>\n<table width=\"484\" border=\"0\" cellspacing=\"0\" cellpadding=\"2\">\n<tbody>\n<tr>\n<td valign=\"top\" width=\"33\">\u00a0<\/td>\n<td valign=\"top\" width=\"166\">\n<p align=\"right\"><strong>ARM<\/strong><\/p>\n<\/td>\n<td valign=\"top\" width=\"283\">\n<ul>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/257\" target=\"_blank\" rel=\"noopener\">ACE and Verification Challenges<\/a><\/li>\n<\/ul>\n<\/td>\n<\/tr>\n<tr>\n<td valign=\"top\" width=\"33\">\u00a0<\/td>\n<td valign=\"top\" width=\"166\">\n<p align=\"right\"><strong>Doulos<\/strong><\/p>\n<\/td>\n<td valign=\"top\" width=\"283\">\n<ul>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/261\" target=\"_blank\" rel=\"noopener\">Using the UVM Register Layer<\/a><\/li>\n<\/ul>\n<\/td>\n<\/tr>\n<tr>\n<td valign=\"top\" width=\"33\">\u00a0<\/td>\n<td valign=\"top\" width=\"166\">\n<p align=\"right\"><strong>Thales Alenia Space<\/strong><\/p>\n<\/td>\n<td valign=\"top\" width=\"283\">\n<ul>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/256\" target=\"_blank\" rel=\"noopener\">Toulouse ASIC &amp; FPGA Verification Flow<\/a><\/li>\n<\/ul>\n<\/td>\n<\/tr>\n<tr>\n<td valign=\"top\" width=\"33\">\u00a0<\/td>\n<td valign=\"top\" width=\"166\">\n<p align=\"right\"><strong>Test &amp; Verification Solutions<\/strong><\/p>\n<\/td>\n<td valign=\"top\" width=\"283\">\n<ul>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/254\" target=\"_blank\" rel=\"noopener\">Resistance is Futile: Learning to love UVM!<\/a><\/li>\n<\/ul>\n<\/td>\n<\/tr>\n<tr>\n<td valign=\"top\" width=\"33\">\u00a0<\/td>\n<td valign=\"top\" width=\"166\">\n<p align=\"right\"><strong>Willamette HDL<\/strong><\/p>\n<\/td>\n<td valign=\"top\" width=\"283\">\n<ul>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/260\" target=\"_blank\" rel=\"noopener\">UVM Express<\/a><\/li>\n<\/ul>\n<\/td>\n<\/tr>\n<tr>\n<td valign=\"top\" width=\"33\">\u00a0<\/td>\n<td valign=\"top\" width=\"166\">\n<p align=\"right\"><strong>Sunburst Design<\/strong><\/p>\n<\/td>\n<td valign=\"top\" width=\"283\">\n<ul>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/262\" target=\"_blank\" rel=\"noopener\">SystemVerilog Tricks for Design &amp; Verification<\/a><\/li>\n<\/ul>\n<\/td>\n<\/tr>\n<tr>\n<td valign=\"top\" width=\"33\">\u00a0<\/td>\n<td valign=\"top\" width=\"166\">\n<p align=\"right\"><strong>Mentor Graphics<\/strong><\/p>\n<\/td>\n<td valign=\"top\" width=\"283\">\n<ul>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/258\" target=\"_blank\" rel=\"noopener\">Evolving Trends in Functional Verification<\/a><\/li>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/251\" target=\"_blank\" rel=\"noopener\">Verification of Low Power SoCs with IEEE UPF<\/a><\/li>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/252\" target=\"_blank\" rel=\"noopener\">Generating Coverage Models and Achieving Coverage Closure<\/a><\/li>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/255\" target=\"_blank\" rel=\"noopener\">Simulation and Formal Assertion-Based Verification<\/a><\/li>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/259\" target=\"_blank\" rel=\"noopener\">Bringing UVM to Life<\/a><\/li>\n<li><a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/253\" target=\"_blank\" rel=\"noopener\">Altera Case Study &#8211; Using Intelligent Testbench Automation to Verify a Bus Fabric<\/a><\/li>\n<\/ul>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>Total Access members can also <a href=\"http:\/\/www.verificationacademy.com\/go\/resource\/263\" target=\"_blank\" rel=\"noopener noreferrer\">download<\/a> all the presentations in a .zip file.\u00a0 Happy reading to all those who were unable to visit us at DAC and thank you to all who were able to stop by and visit.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Live &amp; In-Person at DAC 2012! Verification Academy, the brain child of Harry Foster, Chief Verification Scientist at Mentor Graphics,&#8230;<\/p>\n","protected":false},"author":71541,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[323,331,339,342,350,402,409,438,486,528,562,577,623,751,755,760,785,787,797,820,830],"industry":[],"product":[],"coauthors":[],"class_list":["post-6428","post","type-post","status-publish","format-standard","hentry","category-news","tag-abv","tag-ace","tag-ams","tag-arm","tag-assertion-based-verification","tag-coverage-closure","tag-dac","tag-doulos","tag-formal","tag-ieee","tag-itba","tag-low-power","tag-ovm","tag-systemverilog","tag-tech-design-forum","tag-thales","tag-upf","tag-uvm","tag-uvm-express","tag-verification-academy","tag-verification-trends"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/6428","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/users\/71541"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/comments?post=6428"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/6428\/revisions"}],"predecessor-version":[{"id":14621,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/6428\/revisions\/14621"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media?parent=6428"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/categories?post=6428"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/tags?post=6428"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/industry?post=6428"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/product?post=6428"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/coauthors?post=6428"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}