{"id":5448,"date":"2011-11-10T12:59:42","date_gmt":"2011-11-10T19:59:42","guid":{"rendered":"https:\/\/blogs.mentor.com\/verificationhorizons\/?p=5448"},"modified":"2026-03-27T08:43:59","modified_gmt":"2026-03-27T12:43:59","slug":"tlm-becomes-an-ieee-standard","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2011\/11\/10\/tlm-becomes-an-ieee-standard\/","title":{"rendered":"TLM Becomes an IEEE Standard"},"content":{"rendered":"<h3>IEEE Announces Revision to IEEE 1666\u2122 &#8211; Adds Transaction-Level Modeling Support<\/h3>\n<p>A significant step forward to address standards for advanced system-on-chip (SoC) designs has taken place by the IEEE.\u00a0 The IEEE <a href=\"http:\/\/standards.ieee.org\/news\/2011\/1666revision.html\" target=\"_blank\" rel=\"noopener noreferrer\">announced<\/a> the new revision of the SystemC standard, known as IEEE 1666\u2122-2011, has been approved.\u00a0 While it is a revision of the current SystemC standard, <a href=\"http:\/\/standards.ieee.org\/getieee\/1666\/download\/1666-2005.pdf\" target=\"_blank\" rel=\"noopener noreferrer\">IEEE 1666\u2122-2005<\/a>, the major new feature added was Transaction-Level Modeling (TLM), which is new to an IEEE standard.<\/p>\n<p>For many years now, the TLM specification and accompanying open source code has been incubating in the <a href=\"http:\/\/www.systemc.org\/home\/\" target=\"_blank\" rel=\"noopener noreferrer\">Open SystemC Initiative (OSCI)<\/a>.\u00a0 OSCI\u2019s TLM Working Group has developed the <a href=\"http:\/\/www.systemc.org\/members\/download_files\/check_file?agreement=tlm-1_0\" target=\"_blank\" rel=\"noopener\">TLM 1.0<\/a> and <a href=\"http:\/\/www.systemc.org\/members\/download_files\/check_file?agreement=tlm_2-0_lrm\" target=\"_blank\" rel=\"noopener\">TLM 2.0<\/a> specifications, both of which are part of the revised IEEE 1666 standard.\u00a0 TLM is important to SystemC, but it has also been leveraged outside of it.<\/p>\n<p>We at Mentor Graphics pioneered the use of TLM in SystemVerilog (<a href=\"http:\/\/www.techstreet.com\/standards\/ieee\/1800_2009?product_id=1661206\" target=\"_blank\" rel=\"noopener noreferrer\">IEEE 1800\u2122-2009<\/a>) when our seminal open-source work on the Advanced Verification Methodology (AVM) brought an implementation to the verification community based on SystemVerilog.\u00a0 This lives on today, as AVM motivated the Open Verification Methodology (<a href=\"http:\/\/verificationacademy.com\/go\/resource\/120\" target=\"_blank\" rel=\"noopener noreferrer\">OVM<\/a>), which became the basis for Accellera\u2019s Universal Verification Methodology (<a href=\"http:\/\/www.accellera.org\/activities\/vip\/UVM_1.1_Class_Reference_Final_06062011.pdf\" target=\"_blank\" rel=\"noopener noreferrer\">UVM<\/a>).<\/p>\n<p><a href=\"http:\/\/verificationacademy.com\/course-modules\/dynamic-verification\/advanced-ovm-uvm-universal-verification-methodology\/understanding-transaction-level-modeling\" target=\"_blank\" rel=\"noopener\"><img loading=\"lazy\" decoding=\"async\" class=\"alignright size-full wp-image-5540\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2011\/11\/Understanding-TLM1.jpg\" alt=\"\" width=\"244\" height=\"164\" \/><\/a>If you don\u2019t already know what TLM is and how the verification community is using it in OVM and UVM, the <a href=\"http:\/\/verificationacademy.com\/\" target=\"_blank\" rel=\"noopener noreferrer\">Verification Academy<\/a> has a lot of written material and video training modules that will help you learn how this important new IEEE standard is used from simulation to emulation and has boosted verification productivity.\u00a0 The \u201c<a href=\"http:\/\/www.verificationacademy.com\/course-modules\/dynamic-verification\/advanced-ovm-uvm-universal-verification-methodology\/understanding-transaction-level-modeling\" target=\"_blank\" rel=\"noopener\">Understanding TLM<\/a>\u201d module is featured in the Advanced UVM section, so if you are still a novice to UVM, you may wish to start with the Basic material first.\u00a0 This module is presented by fellow Verification Horizons Blogger, <a href=\"https:\/\/blogs.mentor.com\/verificationhorizons\/blog\/author\/tfitzpat\/\" target=\"_blank\" rel=\"noopener\">Tom Fitzpatrick<\/a> and offers subtitles in English, Russian, Japanese and Chinese (Traditional &amp; Simplified) to help drive rapid global adoption.<\/p>\n<p>As we brought TLM into the modern verification methodology practice with a SystemVerilog implementation, it also surfaced that there is an opportunity for the creator of TLM, <a href=\"http:\/\/www.systemc.org\/home\/\" target=\"_blank\" rel=\"noopener\">OSCI<\/a>, and an adopter of it in UVM, <a href=\"http:\/\/www.accellera.org\/home\" target=\"_blank\" rel=\"noopener\">Accellera<\/a>, to discuss what they could do together.\u00a0 And as I\u2019ve <a href=\"https:\/\/blogs.mentor.com\/verificationhorizons\/blog\/2011\/06\/21\/accellera-osci-unite\/\" target=\"_blank\" rel=\"noopener\">blogged before<\/a>, those two organizations announced their intention to unite before the end of 2011, as others have seen the potential when both are brought together.\u00a0 I expect to see more great ideas come from these two groups when they join forces, just like the TLM work that is now an IEEE standard.<\/p>\n<p>For those who want a copy of the revised IEEE 1666 standard, it is still in final IEEE editorial review as the they do their last formatting.\u00a0 I will share with you when it is ready to use as well as how to get it and where to find it.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>IEEE Announces Revision to IEEE 1666\u2122 &#8211; Adds Transaction-Level Modeling Support A significant step forward to address standards for advanced&#8230;<\/p>\n","protected":false},"author":71541,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[309,313,326,540,620,623,732,749,751,764,765,766,787,820],"industry":[],"product":[],"coauthors":[],"class_list":["post-5448","post","type-post","status-publish","format-standard","hentry","category-news","tag-309","tag-313","tag-accellera","tag-ieee-sa","tag-osci","tag-ovm","tag-standards","tag-systemc","tag-systemverilog","tag-tlm","tag-tlm-1-0","tag-tlm-2-0","tag-uvm","tag-verification-academy"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/5448","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/users\/71541"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/comments?post=5448"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/5448\/revisions"}],"predecessor-version":[{"id":14631,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/5448\/revisions\/14631"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media?parent=5448"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/categories?post=5448"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/tags?post=5448"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/industry?post=5448"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/product?post=5448"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/coauthors?post=5448"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}