User groups were popular too and continue to be today.\u00a0\u00a0 VHDL International (now Accellera) had this notion of local VHDL user group chapters.\u00a0 When it came time to drive adoption of the VHDL gate-level library standard (known as VITAL<\/a>), I attended several user group meetings to share details on how to use the new standard.\u00a0 I even solicited the support of a VHDL notable to put together a seminar series that would help ASIC library makers build their libraries.\u00a0 We took the seminar around the world and met with all the top ASIC suppliers.\u00a0 We even took our product that implemented the standard to the Cloud \u2013 while we did not call it the Cloud at the time.\u00a0 We had a model validation service in the early days of the internet that could be used to run training examples to validate ones own understanding or even test models and concepts to see if they would work.\u00a0 Free evaluation software was still a thing of the future then.\u00a0 As one byproduct of that work, we did have one competitor inundate us with the 1000\u2019s of VHDL tests.\u00a0 We did throttle back their access to be fair to the others.\u00a0 But at that time, we left few ideas unexplored on how to drive global use and adoption of that standard.<\/p>\n What I understood was crossing the chasm from standards development to practicing the standard meant we had to build the knowledge, expertise and confidence in the user community to help them accept the standard and adopt it.\u00a0 I also learned that the standards developing organizations<\/a> were not the best equipped to help practice the standard.\u00a0 The simple reason for this is the SDO is in place to bring together competitors to collaborate on the development of the standard but not foster competition on algorithms to best use the standard.\u00a0 This is perhaps better said by Synopsys\u2019 Karen Bartleson in her \u201cFirst Commandment for Effective Standards<\/a>: Cooperate on Standards; Compete on Tools.\u201d<\/p>\n We are at that chasm with Open Verification Methodology (OVM) and the Universal Verification Methodology (UVM) today.\u00a0 While some may suggest OVM & UVM sit in a homogenous world where it works the same everywhere, the effective practice of the standards is anything but that.\u00a0 There are competitive options for users to explore and they are not ideas best promoted by a standards group.\u00a0 Mentor\u2019s Mark Olen points out the value of an advanced method to generate stimulus rather than relying on the methods built into OVM & UVM in his recent blog post<\/a>.\u00a0 Mark shows how a user gains 10x-100x\u00a0 in efficiency all the while doing this from within their OVM or UVM testbench.<\/p>\n Mentor has thought long and hard about how to best get this information to users and how to help them practice OVM and UVM better than they can if they only had access to the lowest common denominator of information.\u00a0 We first did a blind survey to see what methodology the design and verification community was using now and what they were going to use 12 months from now to validate our focus on OVM and UVM.\u00a0 Mentor\u2019s Harry Foster has shared a lot of detailed information on this already.\u00a0 If you have not read his blog postings on this yet, you should start with his prologue<\/a> that outlines the survey.<\/p>\n The survey clearly showed that UVM was in its ascendency and OVM was going to maintain strong and growing domination into 2012.\u00a0 Other survey results also clearly point out that SystemVerilog is the language of choice.\u00a0 While the survey shows what the user is doing, the standards developers were all collaborating on UVM and giving little time to OVM.<\/p>\n While users were focused on continued use of OVM and planning for major move to UVM in 2012, the community developing standards had all but shifted to UVM, seemingly abandoning OVM.\u00a0 OVM was in need of care and attention given its dominant position in planned and future use.<\/p>\n Mentor stepped into the breach and has brought OVM into a strong, user-centric home that preserves the OVM World openness and augments it with several levels of additional user benefits in the Verification Academy<\/a>.\u00a0 It also joins OVM and UVM in a single location that would not be appropriate in a standards body.\u00a0 After all, UVM is the standard from Accellera, not OVM.\u00a0 The Verification Academy also opens the cross pollination of ideas between the OVM and UVM users so one group can learn from another.\u00a0 We also brought the SystemVerilog User Group (SVUG) into the forum as well since OVM and UVM are based on the SystemVerilog language.<\/p>\n As we brought all these groups together, we did get many questions about Verification Academy Access Levels.\u00a0 First off, we dropped the OVM World requirement to register to download OVM.\u00a0 UVM and VMM were allowing anonymous downloads, so we made it the same for OVM.\u00a0 Of the 15,000+ OVM World registrants, most registered to download OVM.\u00a0 Just as OVM can now be downloaded without registration, the forums can be accessed in read-only mode without registration as well.<\/p>\n For those who used their OVM World registration to post on the forum, we moved them to \u201cForum Only Access\u201d members so they could continue their posting privileges.\u00a0\u00a0 The highest level of membership is \u201cAcademy Total Access.\u201d\u00a0 Membership at this level is restricted to those who give a valid business profile.\u00a0 It enables access to training material, courses and lessons to help build SystemVerilog, OVM and UVM skills.\u00a0 It also allows users to gain knowledge about the advance algorithms that can help them get the 10x-100x or more out of OVM and UVM over conventional use.\u00a0 Below is a table of Verification Academy membership levels and privileges:<\/p>\nLessons Learned<\/h3>\n
Today\u2019s Challenges with UVM & OVM<\/h3>\n
Survey Says:<\/h3>\n
![\"\"](\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2011\/05\/survey-blog-part8.png\")
<\/p>\nA Little Attention Goes a Long Way<\/h3>\n