{"id":4587,"date":"2011-06-21T22:55:12","date_gmt":"2011-06-22T05:55:12","guid":{"rendered":"https:\/\/blogs.mentor.com\/verificationhorizons\/?p=4587"},"modified":"2026-03-27T08:44:08","modified_gmt":"2026-03-27T12:44:08","slug":"accellera-osci-unite","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2011\/06\/21\/accellera-osci-unite\/","title":{"rendered":"Accellera &amp; OSCI Unite"},"content":{"rendered":"<h3>System Standards Worlds Initiate Unification<\/h3>\n<table border=\"0\" width=\"329\" cellspacing=\"0\" cellpadding=\"2\">\n<tbody>\n<tr>\n<td valign=\"top\" width=\"141\"><a href=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2011\/06\/accellera.gif\"><img loading=\"lazy\" decoding=\"async\" style=\"float: none;padding-top: 0px;padding-left: 0px;margin-left: auto;padding-right: 0px;margin-right: auto;border-width: 0px\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2011\/06\/accellera_thumb.gif\" alt=\"accellera\" width=\"130\" height=\"58\" border=\"0\" \/><\/a><\/td>\n<td valign=\"top\" width=\"186\"><a href=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2011\/06\/SystemC-Logo.gif\"><img loading=\"lazy\" decoding=\"async\" style=\"float: none;padding-top: 0px;padding-left: 0px;margin-left: auto;padding-right: 0px;margin-right: auto;border-width: 0px\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2011\/06\/SystemC-Logo_thumb.gif\" alt=\"SystemC Logo\" width=\"161\" height=\"63\" border=\"0\" \/><\/a><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><a href=\"http:\/\/www.accellera.org\/\" target=\"_blank\" rel=\"noopener\">Accellera<\/a>, who brought us SystemVerilog, and the <a href=\"http:\/\/www.systemc.org\/\" target=\"_blank\" rel=\"noopener\">Open SystemC Imitative<\/a> (OSCI), who brought us SystemC have made known their intent to unite to form a single front-end electronic design automation (<a href=\"http:\/\/en.wikipedia.org\/wiki\/Electronic_design_automation\" target=\"_blank\" rel=\"noopener\">EDA<\/a>) standards organization.\u00a0 You can read their joint press release <a href=\"http:\/\/finance.yahoo.com\/news\/Accellera-and-Open-SystemC-iw-4230392122.html?x=0&amp;.v=1\" target=\"_blank\" rel=\"noopener\">here<\/a>.<\/p>\n<p>While this may come as a surprise to many, one thing has remained constant for many years: the two organizations have had a long standing policy of collaborative interactions as both have evolved their standards programs.\u00a0 At a <a href=\"http:\/\/www.date-conference.com\/proceedings\/PAPERS\/2004\/\" target=\"_blank\" rel=\"noopener\">DATE 2004<\/a> panel titled \u201c<em><a href=\"http:\/\/www.date-conference.com\/proceedings\/PAPERS\/2004\/DATE04\/PDFFILES\/01F.PDF\" target=\"_blank\" rel=\"noopener\">SystemC and SystemVerilog: Where do they fit?\u00a0 Where are they going?<\/a><\/em>,\u201d technical members of the two communities gathered to ponder answers to those questions.\u00a0 At <a href=\"http:\/\/www.dac.com\/DACArchive\/pubs\/41stfinal.pdf\" target=\"_blank\" rel=\"noopener\">DAC 2004<\/a>, when I was chair of Accellera and Guido Arnout was chair of OSCI, we stood before a large assembly of SystemC users a few months later to point to what was not so obvious to many, SystemVerilog and SystemC complement each other.<\/p>\n<p><a href=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2011\/06\/OSCISystemCSystemVerilogV1_Page_05.jpg\"><img loading=\"lazy\" decoding=\"async\" style=\"padding-top: 0px;padding-left: 0px;padding-right: 0px;border-width: 0px\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2011\/06\/OSCISystemCSystemVerilogV1_Page_05_thumb.jpg\" alt=\"DAC Slide 5\" width=\"350\" height=\"264\" border=\"0\" \/><\/a><\/p>\n<p>Guido and I dispelled any issues of a \u201clanguage war\u201d and focused on what the value each language and what it delivered to the design and verification community.\u00a0 A lot has transpired since then.\u00a0 Both SystemC and SystemVerilog are now <a href=\"http:\/\/standards.ieee.org\/\" target=\"_blank\" rel=\"noopener\">IEEE standards<\/a>, know as <a href=\"http:\/\/www.techstreet.com\/standards\/IEEE\/1666_2005?product_id=1780876\" target=\"_blank\" rel=\"noopener\">IEEE Std. 1666\u2122<\/a> and <a href=\"http:\/\/www.techstreet.com\/standards\/IEEE\/1800_2009?product_id=1661206\" target=\"_blank\" rel=\"noopener\">IEEE Std. 1800\u2122<\/a> respectively.\u00a0 And both OSCI and Accellera have continued to evolve their standards work program in significant and meaningful ways.<\/p>\n<p>In this evolution, it became clear to me that each organization was \u201ccompleting\u201d the other.\u00a0 OSCI has developed the popular Transaction Level Modeling (<a href=\"http:\/\/www.systemc.org\/apps\/group_public\/workgroup.php?wg_abbrev=tlmwg\" target=\"_blank\" rel=\"noopener\">TLM<\/a>) standards and Accellera had adopted TLM in their Universal Verification Methodology (<a href=\"http:\/\/www.accellera.org\/activities\/vip\" target=\"_blank\" rel=\"noopener\">UVM<\/a>\u2122).\u00a0 As the technical teams from each organization have leveraged each other, it began to make more sense to initiate discussions to unite the two groups to address further front-end EDA standards challenges \u2013 <strong>as one<\/strong>. And, indeed, the two organization recognized this and have taken the steps to determine how best to combine operations into a single organization.<\/p>\n<p>In the months ahead, the unified organization will emerge, but for now, it is business as usual for the standards development teams in OSCI and Accellera.<\/p>\n<p>What do you think about the unification?<\/p>\n","protected":false},"excerpt":{"rendered":"<p>System Standards Worlds Initiate Unification Accellera, who brought us SystemVerilog, and the Open SystemC Imitative (OSCI), who brought us SystemC&#8230;<\/p>\n","protected":false},"author":71541,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[309,313,326,409,414,528,620,749,751,764,787],"industry":[],"product":[],"coauthors":[],"class_list":["post-4587","post","type-post","status-publish","format-standard","hentry","category-news","tag-309","tag-313","tag-accellera","tag-dac","tag-date","tag-ieee","tag-osci","tag-systemc","tag-systemverilog","tag-tlm","tag-uvm"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/4587","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/users\/71541"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/comments?post=4587"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/4587\/revisions"}],"predecessor-version":[{"id":14636,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/4587\/revisions\/14636"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media?parent=4587"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/categories?post=4587"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/tags?post=4587"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/industry?post=4587"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/product?post=4587"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/coauthors?post=4587"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}