{"id":33,"date":"2009-12-02T13:42:22","date_gmt":"2009-12-02T20:42:22","guid":{"rendered":"https:\/\/blogs.mentor.com\/verificationhorizons\/blog\/2009\/12\/02\/full-house-%e2%80%93-and-this-is-no-gamble\/"},"modified":"2026-03-27T08:45:35","modified_gmt":"2026-03-27T12:45:35","slug":"full-house","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2009\/12\/02\/full-house\/","title":{"rendered":"Full House \u2013 and this is no gamble!"},"content":{"rendered":"<p><strong>SystemVerilog proved to be a \u201croyal flush\u201d of a reason for 100\u2019s of people to gather together.<\/strong><\/p>\n<p>Leaving poker references behind, two <a href=\"http:\/\/www.svug.org\/\" target=\"_blank\" rel=\"noopener\">SystemVerilog User Group<\/a> meetings were held in India in November.  The Cliff Cumming\u2019s \u201cfan club\u201d came out in force at both the Noida and Bangalore locations. When I asked the SVUG members if they had read any <a href=\"http:\/\/www.sunburst-design.com\/papers\/\" target=\"_blank\" rel=\"noopener\">Cliff&#8217;s online work<\/a>, nearly everyone raised their hands.<\/p>\n<p>Since nearly 100% of those who registered showed up at the Noida event, I was almost certain we would have the same full house in Bangalore.  We did!  Registration for the event had to close just 4 days after opening.<\/p>\n<figure id=\"attachment_39\" aria-describedby=\"caption-attachment-39\" style=\"width: 448px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-39\" src=\"https:\/\/blogs.mentor.com\/verificationhorizons\/files\/2009\/12\/cliff-presenting-in-noida1.jpg\" alt=\"Cliff Presenting to &quot;Full House&quot;\" width=\"448\" height=\"176\" \/><figcaption id=\"caption-attachment-39\" class=\"wp-caption-text\">Cliff Presenting to &quot;Full House&quot;<\/figcaption><\/figure>\n<p>By the end of each of the events, Cliff was surrounded by user group members who kept asking him questions about SystemVerilog, looking for him to autograph the <a href=\"http:\/\/www.springer.com\/engineering\/circuits+&amp;+systems\/book\/978-1-4419-0967-1\" target=\"_blank\" rel=\"noopener\">OVM Cookbook<\/a> giveaway, shake his hand, and have a picture taken with him.<\/p>\n<figure id=\"attachment_45\" aria-describedby=\"caption-attachment-45\" style=\"width: 448px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-45\" src=\"https:\/\/blogs.mentor.com\/verificationhorizons\/files\/2009\/12\/cliff-autographing1.jpg\" alt=\"Cliff Signing OVM Cookbook Lucky Draws\" width=\"448\" height=\"266\" \/><figcaption id=\"caption-attachment-45\" class=\"wp-caption-text\">Cliff Signing OVM Cookbook Lucky Draws<\/figcaption><\/figure>\n<figure id=\"attachment_37\" aria-describedby=\"caption-attachment-37\" style=\"width: 202px\" class=\"wp-caption alignright\"><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-37  \" src=\"https:\/\/blogs.mentor.com\/verificationhorizons\/files\/2009\/12\/accellera-vip-recommended-practices1.jpg\" alt=\"Accellera VIP Recommended Practices\" width=\"202\" height=\"265\" \/><figcaption id=\"caption-attachment-37\" class=\"wp-caption-text\">Accellera VIP Recommended Practices<\/figcaption><\/figure>\n<p>While Cliff shared <a href=\"http:\/\/www.svug.org\/Resources\/tabid\/69\/Default.aspx\" target=\"_blank\" rel=\"noopener\">tips<\/a> on how designers can easily adopt SystemVerilog Assertions, I <a href=\"http:\/\/www.svug.org\/Portals\/0\/Presentations\/India\/SVUG_VIP_Interoperability_Standards_Update.pdf\" target=\"_blank\" rel=\"noopener\">shared <\/a>the fruit of the Accellera Verification Intellectual Property Technical Subcommittee (VIP-TSC) work.  Accellera recently published the approved <em><a href=\"http:\/\/www.accellera.org\/activities\/vip\/VIP_1.0.pdf\" target=\"_blank\" rel=\"noopener\">Verification Intellectual Property Recommended Practices<\/a> <\/em>guide.<\/p>\n<p>SystemVerilog users also participated when they gave <a href=\"http:\/\/www.svug.org\/Resources\/tabid\/69\/Default.aspx\" target=\"_blank\" rel=\"noopener\">presentations <\/a>the last half of the day and engaged in brisk and deep conversations on the application of SystemVerilog for design and verification.  All the presentations have been cataloged and can be <a href=\"http:\/\/www.svug.org\/Resources\/tabid\/69\/Default.aspx\" target=\"_blank\" rel=\"noopener\">viewed <\/a>by those who were unable to attend.<\/p>\n<p>We look forward to the next SVUG meetings in India!<\/p>\n","protected":false},"excerpt":{"rendered":"<p>SystemVerilog proved to be a \u201croyal flush\u201d of a reason for 100\u2019s of people to gather together. Leaving poker references&#8230;<\/p>\n","protected":false},"author":71541,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[623,732,751],"industry":[],"product":[],"coauthors":[],"class_list":["post-33","post","type-post","status-publish","format-standard","hentry","category-news","tag-ovm","tag-standards","tag-systemverilog"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/33","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/users\/71541"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/comments?post=33"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/33\/revisions"}],"predecessor-version":[{"id":14724,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/33\/revisions\/14724"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media?parent=33"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/categories?post=33"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/tags?post=33"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/industry?post=33"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/product?post=33"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/coauthors?post=33"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}