{"id":19282,"date":"2025-02-10T18:43:17","date_gmt":"2025-02-10T23:43:17","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/?p=19282"},"modified":"2026-03-27T08:53:15","modified_gmt":"2026-03-27T12:53:15","slug":"update-from-the-standards-world-accellera-approves-uvm-ms-1-0-standard","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2025\/02\/10\/update-from-the-standards-world-accellera-approves-uvm-ms-1-0-standard\/","title":{"rendered":"Update from the Standards World: Accellera Approves UVM-MS 1.0 Standard"},"content":{"rendered":"
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Accellera Systems Initiative<\/strong><\/a> approved<\/strong> <\/a>the Universal Verification Methodology for Mixed-Signal (UVM-MS) 1.0 standard. \u00a0This milestone marks a significant advancement in the verification of analog\/mixed-signal (AMS) and digital\/mixed-signal (DMS) integrated circuits and systems.\u00a0 UVM is widely used around the world but has struggled to work well with designs that have analog\/mixed-signal blocks.\u00a0 This is now changed. And it has also given rise to a new logo from Accellera. <\/p>\n\n\n\n

What is UVM-MS?<\/strong><\/h2>\n\n\n\n

UVM-MS 1.0 is a comprehensive and unified verification methodology that extends the capabilities of the existing Universal Verification Methodology (UVM) to include mixed-signal environments. This standard provides a robust framework to create AMS verification components and testbenches by integrating digital-centric UVM classes with analog\/mixed-signal verification techniques. \u00a0The goal is to enhance the efficiency and effectiveness of verifying complex mixed-signal designs, ultimately improving design quality and reducing time-to-market.<\/p>\n\n\n\n

The new standard is available for immediate download fee-free here<\/strong><\/a>.\u00a0 <\/p>\n\n\n\n

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Learn more at Accellera DVCon U.S. 2025 Luncheon<\/strong><\/h2>\n\n\n\n

To celebrate this achievement and provide more insights into the UVM-MS standard, you are invited to join us at the Accellera luncheon on Monday, February 24th, during DVCon U.S. 2025<\/strong><\/a>. \u00a0My colleague, Tom Fitzpatrick, who chairs the Accellera UVM-MS committee, will briefly speak at the luncheon to introduce this new standard and discuss its implications for the industry. This is a fantastic opportunity to learn more about UVM-MS and network with industry professionals.\u00a0<\/p>\n\n\n\n

Commitment to IEEE Standardization<\/strong><\/h2>\n\n\n\n

Accellera expressed its long-term commitment to transfer the UVM-MS standard to the IEEE for further development, maintenance, and global adoption. \u00a0We look forward to Accellera fulfilling this long-term commitment when it is ready. \u00a0As a reminder, the IEEE Std. 1800.2, which forms the foundation of UVM, is available for download fee-free from the IEEE Get Design Automation<\/strong><\/a> site. This ensures that engineers and designers worldwide have access to the knowledge they need to use and benefit from these standards.<\/p>\n\n\n\n

Looking Ahead<\/strong><\/h2>\n\n\n\n

The approval of UVM-MS 1.0 is just the beginning. \u00a0As we continue to develop and refine verification methodologies, Accellera remains dedicated to support the industry with innovative standards that address the evolving challenges of design and verification. \u00a0I look forward to seeing the positive impact of UVM-MS on AMS and DMS verification and I\u2019m excited about the future advancements this standard will enable.\u00a0<\/p>\n","protected":false},"excerpt":{"rendered":"

Accellera Systems Initiative approved the Universal Verification Methodology for Mixed-Signal (UVM-MS) 1.0 standard. \u00a0This milestone marks a significant advancement in…<\/p>\n","protected":false},"author":71541,"featured_media":19286,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[442,534,732,787,1623],"industry":[1564,53],"product":[205,206],"coauthors":[920],"class_list":["post-19282","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news","tag-dvcon","tag-ieee-1800-2","tag-standards","tag-uvm","tag-uvm-uvm-ms","industry-electronic-design-automation","industry-electronics-semiconductors","product-questa","product-questa-verification-ip"],"featured_image_url":"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2025\/02\/im2019040292di_300dpi_original-scaled.jpg","_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/19282","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/users\/71541"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/comments?post=19282"}],"version-history":[{"count":3,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/19282\/revisions"}],"predecessor-version":[{"id":19288,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/19282\/revisions\/19288"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media\/19286"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media?parent=19282"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/categories?post=19282"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/tags?post=19282"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/industry?post=19282"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/product?post=19282"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/coauthors?post=19282"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}