{"id":18160,"date":"2023-01-25T16:12:42","date_gmt":"2023-01-25T21:12:42","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/?p=18160"},"modified":"2026-03-27T08:50:47","modified_gmt":"2026-03-27T12:50:47","slug":"ieee-honors-tom-fitzpatrick","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2023\/01\/25\/ieee-honors-tom-fitzpatrick\/","title":{"rendered":"IEEE Honors Tom Fitzpatrick"},"content":{"rendered":"\n

At the IEEE Standards Association\u2019s 2022 winter awards ceremony<\/a>, Tom Fitzpatrick was honored for his leadership in standards development and stewardship with the IEEE Design Automation Standards Committee\u2019s (DASC<\/a>) Ron Waxman Meritorious Service Award.\u00a0 The award was named after the DASC\u2019s founding chair and we were thrilled to have Mr. Waxman in person to help present this award.\u00a0<\/p>\n\n\n\n

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Pictured: Dennis Brophy, DASC, chair; Ron Waxman, DASC chair emeritus; Tom Fitzpatrick, honoree and chair IEEE P1800; Yatin Trivedi, chair IEEE SA awards committee<\/figcaption><\/figure>\n\n\n\n

More than 25 years ago, Tom started his standards journey as a member of the Verilog standardization team.\u00a0 As Accellera\u2019s SystemVerilog standards technical committee was proposing additions to complement Verilog, Tom joined that effort and continued his participation in IEEE P1364.\u00a0 He eventually became chair of the IEEE 1364 Working Group.\u00a0 His leadership of IEEE P1364 resulted in a smooth integration of the IEEE Std. 1364\u2122-2005<\/a> standard with the next revision of IEEE P1800<\/a>.<\/p>\n\n\n\n

Today, Tom chairs the IEEE P1800 working group where the legacy of Verilog continues to thrive in the larger SystemVerilog standard.\u00a0 He has expanded discussions within the IEEE P1800 Working Group to address revisions to the standard to better support analog\/mixed-signal (AMS) designs.\u00a0 He has strengthened the interactions with the relevant Accellera technical committees defining SystemVerilog AMS that demonstrate his excellent leadership and sustained commitment to Verilog. <\/p>\n\n\n\n

That commitment is also seen in his long-standing championship of the Universal Verification Methodology <\/a>(UVM) that was built on top of IEEE Std. 1800.\u00a0 He participated in the IEEE P1800.2 <\/a>UVM Working Group since its inception when UVM was transferred from Accellera to the IEEE Design Automation Standards Committee (DASC).\u00a0 Tom has a long history of incubating standards in the Accellera System Initiative<\/a> where he has held several technical and leadership positions and continues his work there on things that will someday become additional IEEE DASC standards.\u00a0 Within Accellera, he chairs the working group developing AMS extensions for UVM, known as the UVM-AMS Working Group<\/a>, and is vice chair of the Portable Test and Stimulus Standard<\/a> (PSS).<\/p>\n\n\n\n

To help bring all these standards to life, promote industry adoption, and foster learning by design and verification engineers, he holds leadership roles in many of Accellera\u2019s Design & Verification Conferences and the IEEE Design Automation Conference.\u00a0 If you attend a DVCon or DAC, you will probably run into him. At DVCon U.S. 2023<\/a>, Accellera has sponsored a workshop on Applications of the UVM-AMS Standard<\/a><\/em> that will share details on the status of this emerging standard where you can see him! <\/p>\n\n\n\n

You can catch a few glimpses of Tom during the IEEE SA\u2019s award ceremony video highlights from the IEEE’s YouTube channel below.\u00a0 Tom continues to have a profound impact on the worldwide electronics industry through his dedication to create, support, and promote industry standards. Congratulations to Tom on this honor and we look forward to what he brings us next! <\/p>\n\n\n\n

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