{"id":11765,"date":"2015-07-30T08:50:32","date_gmt":"2015-07-30T15:50:32","guid":{"rendered":"https:\/\/blogs.mentor.com\/verificationhorizons\/?p=11765"},"modified":"2026-03-27T08:49:28","modified_gmt":"2026-03-27T12:49:28","slug":"uvm-the-next-ieee-standard-1800-2","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2015\/07\/30\/uvm-the-next-ieee-standard-1800-2\/","title":{"rendered":"UVM: The Next IEEE Standard (1800.2)"},"content":{"rendered":"

Accellera Handoffs UVM to IEEE<\/h3>\n

It has been a long path from Mentor\u2019s AVM to IEEE P1800.2<\/strong><\/a>.\u00a0 But the moment has arrived: Accellera has formally announced<\/strong><\/a> UVM 1.2 will be submitted as a contribution to the IEEE P1800.2\u2122 working group.<\/p>\n

Verification Methodology Beginnings<\/h3>\n

As the IEEE finalized approval of the initial release of SystemVerilog (IEEE Std. 1800\u2122<\/strong><\/a>) in 2005, I floated the idea of the need for a methodology that would be a companion to it.\u00a0 At the time there was little to no industry desire to explore this opportunity in earnest \u2013 apart from interest by Mentor Graphics \u2013 so we launched our Advanced Verification Methodology (AVM) and set a new direction for an open functional verification methodology.\u00a0 We built implementations of AVM based on SystemVerilog and SystemC (IEEE Std. 1666\u2122<\/strong>).\u00a0 We also pioneered an open-source mechanism based on the Apache 2.0 license which is now the accepted license to foster global and rapid open-source adoption in the EDA industry.\u00a0 And as others joined with us in this journey, AVM grew to become OVM, then UVM.\u00a0 Now UVM is set to become an IEEE standard.\u00a0 The IEEE has assigned it project number 1800.2.<\/p>\n

\"image\"<\/a>Path to IEEE<\/h3>\n

To say we are pleased to see UVM move to the IEEE is an understatement.\u00a0 We congratulate the Accellera UVM team on its accomplishment and look forward to participate in this phase of UVM\u2019s standardization. Since our first public announcement<\/strong><\/a> on May 8, 2006 when we introduced the world to AVM and announced support<\/strong><\/a> for it from 19 of our Questa Vanguard Partners<\/strong>, to our announced collaboration<\/strong><\/a> with Cadence Design Systems on the development of the Open Verification Methodology (OVM) on August 16, 2007 and the eventual announcement<\/strong> January 8, 2010 that Accellera adopts OVM as the basis of its Universal Verification Methodology, we have guided its development and supported a path for the Big-3 EDA to voice positive public support.\u00a0 We are thrilled Accellera has announced<\/strong><\/a> its delivery of UVM to the IEEE for ongoing standardization and maintenance.<\/p>\n

IEEE Standardization<\/h3>\n

What comes next?\u00a0 The IEEE P1800.2 (UVM) project has announced a Call for Participation<\/strong><\/a> and kickoff meeting to be held August 6, 2015 from 9am \u2013 11am PDT.\u00a0 The first meeting will be held via teleconference.\u00a0 In order to attend, you will need to register<\/strong> for the meeting.\u00a0 Membership in the IEEE project will be \u201centity-based\u201d with one company, one vote.\u00a0 The call for participation has details on membership requirements in order to observe or actively participate.\u00a0 The 1800.2 project will only focus on the written specification and not the open-source base class library (BCL).\u00a0 The Accellera UVM TSC will continue to update the BCL.\u00a0 Accellera has committed to keep the BCL implementation current with changes proposed and approved by the IEEE 1800.2 working group.\u00a0 This is just like the arrangement Accellera has with the IEEE for SystemC.<\/p>\n

Join us at the upcoming meeting and remember to register<\/strong> in order to attend!<\/p>\n

\u00a0<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

Accellera Handoffs UVM to IEEE It has been a long path from Mentor\u2019s AVM to IEEE P1800.2.\u00a0 But the moment…<\/p>\n","protected":false},"author":71541,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[309,313,314,363,528,623,671,732,749,751,787],"industry":[],"product":[],"coauthors":[920],"class_list":["post-11765","post","type-post","status-publish","format-standard","hentry","category-news","tag-309","tag-313","tag-1800-2","tag-avm","tag-ieee","tag-ovm","tag-questa-vanguard","tag-standards","tag-systemc","tag-systemverilog","tag-uvm"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/11765","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/users\/71541"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/comments?post=11765"}],"version-history":[{"count":2,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/11765\/revisions"}],"predecessor-version":[{"id":17588,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/11765\/revisions\/17588"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media?parent=11765"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/categories?post=11765"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/tags?post=11765"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/industry?post=11765"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/product?post=11765"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/coauthors?post=11765"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}