{"id":11620,"date":"2015-06-04T09:00:14","date_gmt":"2015-06-04T16:00:14","guid":{"rendered":"https:\/\/blogs.mentor.com\/verificationhorizons\/?p=11620"},"modified":"2026-03-27T08:42:52","modified_gmt":"2026-03-27T12:42:52","slug":"dda","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2015\/06\/04\/dda\/","title":{"rendered":"It\u2019s Time for a New Verification Debug Data API (DDA)"},"content":{"rendered":"<h2>Learn more about DDA at DAC<\/h2>\n<p><img decoding=\"async\" style=\"margin: 0px 0px 0px 5px;float: right\" src=\"http:\/\/www.dac.com\/sites\/default\/files\/52DAC_logo.png\" alt=\"\" align=\"right\" \/>At DAC &#8211; Mentor Graphics and Cadence Design Systems are coming together to usher in another level of productivity in verification results data access and portability with a modern design debug data application programming interface standard. We call this emerging standard the Debug Data API, or DDA for short.\u00a0 We want to share more details with you in person at <strong><a href=\"http:\/\/www.dac.com\/\" target=\"_blank\" rel=\"noopener\">DAC<\/a><\/strong>.\u00a0 Join us on Tuesday, June 9th, at the <a href=\"https:\/\/verificationacademy.com\/events\/academy-dac-booth-2408\" target=\"_blank\" rel=\"noopener\"><strong>Verification Academy Booth<\/strong><\/a> <a href=\"https:\/\/s3.amazonaws.com\/images.verification.academy\/forum\/verification-academy-exhibitor-floor-dac-2015.jpg\" target=\"_blank\" rel=\"noopener\"><strong>(#2408<\/strong><\/a><strong>)<\/strong> at 5:00pm for a joint presentation and unveiling.\u00a0 And to get a bit of background and hint of what&#8217;s to come, please read on.<\/p>\n<h2>History: It Started with VCD<\/h2>\n<p>In the beginning we had VCD as the universal standard format to exchange simulation results as part of the IEEE 1364 (Verilog) standard.\u00a0\u00a0 Anyone trying to use VCD today on those large SoC\u2019s or complex FPGA\u2019s knows the size of VCD files has all but excluded this portion of the IEEE standard from use in modern design verification practice. So the question is when will it be replaced?<\/p>\n<p>To ask that question today seems fine.\u00a0 But I was even skeptical in the mid 1990\u2019s when we at Mentor Graphics created Extended VCD to support the IEEE 1076.4 (VITAL) gate level simulation standard.\u00a0 At that time the largest designs were around 1 million gates. While Extended VCD never became an official IEEE standard, we shared it with our ASIC Vendor and FPGA partners along with our major competitors to ensure debug data access and portability for VITAL users was on par with Verilog.\u00a0 But Extended VCD also suffers the same fate of being almost impossible to support modern large designs.<\/p>\n<h2>Today: VCD Replaced by a Proprietary World<\/h2>\n<p>VCD and Extended VCD have remained static for about 20 years. But commercial simulator, emulator and other verification technology suppliers have not stopped innovating to advance support for larger design sizes with larger result data sets. As we move to 2 billion gate designs and beyond, the dependence on these private and closed technological advances and innovations has never been more important.<\/p>\n<p>But that proprietary dependence comes with a cost. We stand at a crossroads where consumers of verification results information lose the open and unencumbered use offered by VCD or they need a path forward that preserves their current benefits while protecting and encouraging producers of such information to continue to innovate by private means.\u00a0 The only alternative are fully integrated solutions from a single supplier that rarely get consumer endorsement in a best-of-breed; mix-and-match world.<\/p>\n<h2>Near Future: Federating the Proprietary World with DDA<\/h2>\n<p>Federating proprietary solutions almost sounds like something that is impossible to do. But Mentor and Cadence will share their emerging work on a standard to federate the different sources of verification results that can come from private sources with unencumbered access for the consumer. The Debug Data API standard will offer consumers the benefits of VCD interoperability, data portability and openness while preserving the benefits of private innovation for tool and solution producers. It will not impose data format translations from one format to another as a means to promote data portability.\u00a0 It will not require the means by which one supplier or another stores verification results to be exposed.\u00a0 It will offer the best of both worlds to producers and consumers.\u00a0 I guess in some cases, you can have your cake and eat it too! There are more details to share, and the best place start is to meet us at DAC.<\/p>\n<p><a href=\"https:\/\/verificationacademy.com\/events\/academy-dac-booth-2408\" target=\"_blank\" rel=\"noopener\"><img loading=\"lazy\" decoding=\"async\" style=\"margin: 0px 0px 0px 5px;border: 0px currentcolor;float: right\" title=\"VA DDA Session Abstract\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2015\/06\/VA-DDA-Session-Abstract.png\" alt=\"VA DDA Session Abstract\" width=\"315\" height=\"320\" align=\"right\" border=\"0\" \/><\/a><strong><u>Mentor and Cadence Share DDA Details at DAC<\/u><\/strong><\/p>\n<ul>\n<li><strong>Location:<\/strong> Verification Academy Booth (#2408)<\/li>\n<li><strong>Date:<\/strong> Tuesday, June 9th<\/li>\n<li><strong>Time:<\/strong> 5:00pm PT<br \/>\n<a href=\"https:\/\/verificationacademy.com\/events\/academy-dac-booth-2408\" target=\"_blank\" rel=\"noopener\"><strong>More Information &gt;<\/strong><\/a><\/li>\n<\/ul>\n<p>We will discuss the details of DDA and show a proof of concept demonstration that will highlight each company\u2019s simulator and results viewer in action.\u00a0 Since there is no other session following this one at the Verification Academy booth, we will also be around to discuss the next steps with all present afterwards.<\/p>\n<p>You can read more about this from my colleague and competitor, Cadence\u2019s Adam Sherer, on his blog at the Cadence site <strong><a href=\"http:\/\/community.cadence.com\/cadence_blogs_8\/b\/fv\/archive\/2015\/06\/04\/it-s-time-to-modernize-debug-data-and-it-s-happening-at-dac\" target=\"_blank\" rel=\"noopener noreferrer\">here<\/a><\/strong>.\u00a0 He bring his own perspective to this.<\/p>\n<p>See you at DAC!<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Learn more about DDA at DAC At DAC &#8211; Mentor Graphics and Cadence Design Systems are coming together to usher&#8230;<\/p>\n","protected":false},"author":71541,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[409,419,420,472,529,530,533,732,751,814,831,833,842],"industry":[],"product":[],"coauthors":[],"class_list":["post-11620","post","type-post","status-publish","format-standard","hentry","category-news","tag-dac","tag-debug","tag-debug-data-api","tag-extended-vcd","tag-ieee-1076","tag-ieee-1364","tag-ieee-1800","tag-standards","tag-systemverilog","tag-vcd","tag-verilog","tag-vhdl","tag-vital"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/11620","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/users\/71541"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/comments?post=11620"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/11620\/revisions"}],"predecessor-version":[{"id":14593,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/11620\/revisions\/14593"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media?parent=11620"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/categories?post=11620"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/tags?post=11620"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/industry?post=11620"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/product?post=11620"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/coauthors?post=11620"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}