{"id":1156,"date":"2010-05-12T14:34:18","date_gmt":"2010-05-12T21:34:18","guid":{"rendered":"https:\/\/blogs.mentor.com\/verificationhorizons\/?p=1156"},"modified":"2026-03-27T08:33:42","modified_gmt":"2026-03-27T12:33:42","slug":"high-level-design-validation-and-test-hldvt-2010","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2010\/05\/12\/high-level-design-validation-and-test-hldvt-2010\/","title":{"rendered":"High-Level Design Validation and Test (HLDVT) 2010"},"content":{"rendered":"<div><\/div>\n<p><span><\/p>\n<p class=\"MsoNormal\"><span><span>I&#8217;ve had the pleasure of participating in the IEEE International High-Level Design Validation and Test (HLDVT) workshop off and on for the past ten years.<span>\u00a0 <\/span>In fact, of all the workshops and conferences I attend each year, I would probably rank this workshop up there as as one of my favorites. Each year, I look forward to re-connecting with many wonderful thought leaders from both industry and academia who regularly participate. <\/span><\/span><\/p>\n<p class=\"MsoNormal\"><span><span>At this year&#8217;s HLDVT, I am honored to have the opportunity to participate on a panel titled &#8220;Clock Domain Verification Challenges.&#8221; I&#8217;d be interested in hearing your views on the subject, particularly emerging challenges around network-on-chip architectures.<\/span><\/span><\/p>\n<p class=\"MsoNormal\"><span><span>In addition to the panel, this year&#8217;s HLDVT provides a rich program with five regular sessions, five special sessions, one tutorial, one keynote speech. There are several areas of intense focus. First, there is a session on firmware validation and one on HW-dependent software, to highlight the importance of embedded software. A session and panel are devoted to multi-clock systems and clock domain crossing verification, deployed in a variety of scenarios. One session is devoted to transaction-level modeling and another one deals with high-level arithmetic circuit descriptions to obtain more from circuits. Industry leaders in Electronic System Level (ESL) design will share their perspectives on verification challenges at ESL, and a variety of papers will deal with formal verification advances, constraint solving, coverage, and verification accelerators and emulators. <\/span><\/span><\/p>\n<p class=\"MsoNormal\"><span><span>This year&#8217;s HLDVT workshop, which is scheduled for June 11-12, is co-located with 47th<span>\u00a0 <\/span>Design Automation Conference, June 13-18, 2010 at the Anaheim Convention Center, Anaheim, CA. For more information, visit <a href=\"http:\/\/www.hldvt.com\/10\/\" target=\"_blank\" rel=\"noopener\">http:\/\/www.hldvt.com\/10\/<\/a>.<\/span><\/span><\/p>\n<p>\u00a0<\/p>\n<p><\/span><\/p>\n<p class=\"MsoNormal\"><a rel=\"attachment wp-att-1158 noopener\" href=\"https:\/\/blogs.mentor.com\/verificationhorizons\/blog\/2010\/05\/12\/high-level-design-validation-and-test-hldvt-2010\/ieeecs\/\" target=\"_blank\"><img loading=\"lazy\" decoding=\"async\" class=\"alignleft size-full wp-image-1158\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/54\/2010\/05\/ieeecs.gif\" alt=\"IEEE International High-Level Design Validation and Test Workshop\" width=\"136\" height=\"100\" \/><\/a>\u00a0Hope you can attend!<\/p>\n<p class=\"MsoNormal\">\u00a0<\/p>\n<p class=\"MsoNormal\">\u00a0<\/p>\n<p class=\"MsoNormal\">\u00a0<\/p>\n","protected":false},"excerpt":{"rendered":"<p>I&#8217;ve had the pleasure of participating in the IEEE International High-Level Design Validation and Test (HLDVT) workshop off and on&#8230;<\/p>\n","protected":false},"author":71592,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[],"industry":[],"product":[],"coauthors":[],"class_list":["post-1156","post","type-post","status-publish","format-standard","hentry","category-news"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/1156","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/users\/71592"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/comments?post=1156"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/1156\/revisions"}],"predecessor-version":[{"id":19720,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/1156\/revisions\/19720"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media?parent=1156"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/categories?post=1156"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/tags?post=1156"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/industry?post=1156"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/product?post=1156"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/coauthors?post=1156"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}