{"id":10428,"date":"2013-11-15T13:36:24","date_gmt":"2013-11-15T20:36:24","guid":{"rendered":"https:\/\/blogs.mentor.com\/verificationhorizons\/?p=10428"},"modified":"2026-03-27T08:41:30","modified_gmt":"2026-03-27T12:41:30","slug":"new-verification-horizons-issue-available","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/2013\/11\/15\/new-verification-horizons-issue-available\/","title":{"rendered":"New Verification Horizons Issue Available"},"content":{"rendered":"<p>Wanted to let you all know that the October, 2013 issue of <em>Verification Horizons<\/em> is available online. You can view the articles or download the issue <a href=\"https:\/\/verificationacademy.com\/verification-horizons\/october-2013-volume-9-issue-3\" target=\"_blank\" rel=\"noopener\">here<\/a>. In addition to a little paternal bragging in the Introduction, I wanted to call your attention in particular to a few of the articles written by some Mentor colleagues:<\/p>\n<ul>\n<li><a title=\"Software-Driven Testing of AXI Bus in a Dual Core ARM System\" href=\"https:\/\/verificationacademy.com\/verification-horizons\/october-2013-volume-9-issue-3#article2\" target=\"_blank\" rel=\"noopener noreferrer\">Software-Driven Testing of AXI Bus in a Dual Core ARM System<\/a><em> by Mark Olen, Mentor Graphics<br \/>\n<\/em>In this article, Mark presents an architecture for verifying the functionality and performance of a complex AXI bus fabric using a combination of SystemVerilog and C software-driven test techniques, where the operation of the C code is automatically coordinated with additional UVM stimulus to ensure that you&#8217;re hitting corner cases of your software as well as your hardware.<\/li>\n<li><a title=\"Caching in on Analysis\" href=\"https:\/\/verificationacademy.com\/verification-horizons\/october-2013-volume-9-issue-3#article3\" target=\"_blank\" rel=\"noopener noreferrer\">Caching in on Analysis<\/a><em> by Mark Peryer, Mentor Graphics<br \/>\n<\/em>Our &#8220;other Mark&#8221; explains how to verify complex interconnect subsystems in Questa through testbench and instrumentation generation, as well as automated stimulus to target interconnect functionality and cache coherency.<\/li>\n<li><a title=\"DDR SDRAM Bus Monitoring using Mentor Verification IP\" href=\"https:\/\/verificationacademy.com\/verification-horizons\/october-2013-volume-9-issue-3#article4\" target=\"_blank\" rel=\"noopener noreferrer\">DDR SDRAM Bus Monitoring using Mentor Verification IP<\/a><em> by Nikhil Jain, Mentor Graphics<br \/>\n<\/em>Here, Nikhil explains how Mentor&#8217;s DDR VIP can be used as a bus monitor, taking advantage of builtin coverage and assertions, to ensure proper protocol behavior.<\/li>\n<li><a title=\"Life Isn&#039;t Fair, So Use Formal\" href=\"https:\/\/verificationacademy.com\/verification-horizons\/october-2013-volume-9-issue-3#article6\" target=\"_blank\" rel=\"noopener noreferrer\">Life Isn&#8217;t Fair, So Use Formal<\/a><em> by Roger Sabbagh, Mentor Graphics<br \/>\n<\/em>Roger will show you how to use Questa CoverCheck to help you reach (or usually eliminate) that last 10% of code coverage that always seems to take so long.<\/li>\n<\/ul>\n<p>I had to write my introduction before the Red Sox actually made it to the World Series, but I just have to say that<\/p>\n<ol>\n<li>I picked the Sox to beat the Tigers in 6 games in the ALCS (including calling Big Papi&#8217;s grand slam in game two &#8211; ask my son), and<\/li>\n<li>I picked the Sox to beat the Cardinals in 6 games to win the World Series.<\/li>\n<\/ol>\n<p>Just wanted you all to know that.<\/p>\n<p>-Tom<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Wanted to let you all know that the October, 2013 issue of Verification Horizons is available online. You can view&#8230;<\/p>\n","protected":false},"author":71936,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[],"industry":[],"product":[],"coauthors":[],"class_list":["post-10428","post","type-post","status-publish","format-standard","hentry","category-news"],"_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/10428","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/users\/71936"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/comments?post=10428"}],"version-history":[{"count":1,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/10428\/revisions"}],"predecessor-version":[{"id":14532,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/posts\/10428\/revisions\/14532"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/media?parent=10428"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/categories?post=10428"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/tags?post=10428"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/industry?post=10428"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/product?post=10428"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/verificationhorizons\/wp-json\/wp\/v2\/coauthors?post=10428"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}