{"id":1790,"date":"2022-10-28T16:42:50","date_gmt":"2022-10-28T20:42:50","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/tessent\/?p=1790"},"modified":"2026-03-26T16:06:58","modified_gmt":"2026-03-26T20:06:58","slug":"secure-on-chip-communication-for-embedded-analytics","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/tessent\/2022\/10\/28\/secure-on-chip-communication-for-embedded-analytics\/","title":{"rendered":"Message-based connections enable system-level debug and validation"},"content":{"rendered":"\n

A key element in silicon lifecycle management is getting the right kind of data from your chip at key points in the silicon lifecycle, such as debug and validation. One of the \u201csuperpowers\u201d of Tessent Embedded Analytics is its ability to securely capture functional data, via sophisticated monitoring IPs like our Bus Monitor and Static Instrumentation. (You can see all the Embedded Analytics products here<\/a>). The nature of Embedded Analytics monitors sets them apart from structural monitoring technology like traditional DFT, and from very basic in-chip process, voltage and temperature (PVT) monitors.<\/p>\n\n\n\n

These functional monitors help us understand the complete hardware-software system within the chip. But they are only part of the story. What’s just as important is the on-chip communications infrastructure that links the monitors into a co-ordinated whole. This is what we call the Secure Message Infrastructure<\/strong> or SMI<\/strong>.<\/p>\n\n\n\n

What is the Secure Message Infrastructure?<\/strong><\/h2>\n\n\n\n

The SMI is a secure, scalable communications fabric that functions independently from the chip\u2019s main interconnect. It carries data from the on-chip monitors and makes that data available (via gateway IPs called communicators) to the outside world. It allows the on-chip monitors (and their internal counters and filters) to be configured at run time, either via a host or programmatically. This is a key capability in ensuring that the system can \u201cmeasure what matters\u201d. Just as importantly, the SMI allows the various Embedded Analytics IPs to send messages between themselves.<\/p>\n\n\n\n

It\u2019s tempting to think of the SMI as \u201cjust plumbing,\u201d but it\u2019s actually much more than that. For example, allowing the monitor IPs to intercommunicate is key to enabling what we call \u201cany-to-any cross-triggering\u201d \u2013 meaning that if a monitor detects a pre-defined behavior somewhere on the chip, it can trigger a monitoring action anywhere else within the Embedded Analytics infrastructure. So, if an NoC Monitor captures an event on the main system NoC, it can then initiate capture of processor trace from a CPU elsewhere on the chip.<\/a><\/p>\n\n\n\n

Why SMI beats point-to-point interconnects<\/strong><\/h2>\n\n\n\n

This is an important capability if your aim is to understand the behavior of the entire system. It\u2019s also difficult to achieve using the point-to-point style interconnects used by traditional on-chip debug and validation systems. Why? Because using a point-to-point system requires the designer to know in advance which modules are going to need to communicate with each other: the monitors need to be \u201cwired up\u201d at design time. In contrast, a message-based architecture allows designers to take a more natural \u201cbottom up\u201d approach. The SoC can be designed hierarchically \u2013 with each subsystem including associated block-level monitoring subsystems. The blocks are brought together as the design progresses. An infrastructure like the SMI allows entire blocks to be duplicated and instantiated unchanged. Verification can also proceed hierarchically.<\/p>\n\n\n\n

Also, point-to-point monitoring architectures are notoriously difficult to close for timing. In contrast, the SMI is non-blocking and includes retiming capabilities, meaning that data is never lost on the interconnect, but all events can be tracked in real time.<\/p>\n\n\n\n

Advanced security features<\/strong><\/h2>\n\n\n\n

As the name suggests, the SMI also includes advanced security features that allow all or part of the Embedded Analytics infrastructure to be locked down. The most obvious scenario when this is required is to prevent customers, end users or malicious actors from capturing information from inside the chip after deployment. But there are more subtle use cases, such as when a chip maker wants to selectively grant access to certain categories of information to a development partner. The SMI is equipped with a simple yet effective set of locks, distributed through the communications fabric, which allows for a broad range of these scenarios.<\/p>\n\n\n\n

\"\"
Example locking scheme allowing passive monitoring only, no debug access.<\/figcaption><\/figure>\n\n\n\n

So, as you can see, the SMI is far from \u201cjust plumbing\u201d\u2014 it\u2019s the infrastructure on which Embedded Analytics relies to do the most effective job possible in helping to understand the behavior of an SoC. It provides a mechanism to protect the Embedded Analytics system from unauthorized access using a more flexible and robust architecture than what is currently available in point-to-point interconnects.<\/p>\n\n\n\n

You can find out more about the SMI by downloading the product factsheet<\/a>.<\/p>\n","protected":false},"excerpt":{"rendered":"

Secure Message Infrastructure is a scalable, message-based on-chip communications fabric that facilitates system-level debug and validation by allowing configuration of on-chip Embedded Analytics IP, cross-triggering and data capture<\/p>\n","protected":false},"author":74660,"featured_media":1791,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1,9],"tags":[713,370,712,372,711,714],"industry":[53],"product":[629],"coauthors":[438],"class_list":["post-1790","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news","category-product-updates","tag-debug","tag-embedded-analytics","tag-secure-chip","tag-silicon-lifecycle","tag-soc-security","tag-validation","industry-electronics-semiconductors","product-tessent-embedded-analytics"],"featured_image_url":"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/48\/2022\/10\/hero-smi-blog.jpg","_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/posts\/1790","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/users\/74660"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/comments?post=1790"}],"version-history":[{"count":5,"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/posts\/1790\/revisions"}],"predecessor-version":[{"id":1812,"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/posts\/1790\/revisions\/1812"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/media\/1791"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/media?parent=1790"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/categories?post=1790"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/tags?post=1790"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/industry?post=1790"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/product?post=1790"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/tessent\/wp-json\/wp\/v2\/coauthors?post=1790"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}