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Improve defect detection for competitive, high-quality SoCs

April 6, 2021

To deliver the highest quality SoCs, these manufacturing test strategies ensure defects are detected before it’s too late. It is…

By Tessent Solutions
3 MIN READ

Tessent Wraps Up Summer Webinar Series

October 6, 2020

The summer of 2020 featured several new webinars from the Tessent Test Solutions group at Mentor, a Siemens business. These…

By Tessent Solutions
2 MIN READ
Pattern Matching in Test and Yield Analysis

Pattern Matching in Test and Yield Analysis

August 1, 2016

By Geir Eide and Jonathan Muirhead Analyzing fail data with pattern matching helps companies identify yield limiters faster to increase…

By Tessent Solutions
4 MIN READ
Test Pattern Retargeting in 3D SICs using an IEEE 1687 based 3DFT architecture

Test Pattern Retargeting in 3D SICs using an IEEE 1687 based 3DFT architecture

April 8, 2016

Retarget your 2D test to 3D with IJTAG

By Tessent Solutions
< 1 MIN READ
Hierarchical DFT: How to Do More, More Quickly, with Fewer Resources

Hierarchical DFT: How to Do More, More Quickly, with Fewer Resources

March 15, 2016

By Rick Fisette, Mentor Graphics Is DFT a barrier to tapeout? Time to consider going hierarchical.

By Tessent Solutions
4 MIN READ

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