Lumped block package representation makes the best use of limited available data to simulate for an ‘indication’ of case temperature. Some indication is better than none but I wouldn’t bet on it, really, I wouldn’t. Accurate case and junction temperature prediction can only be realised with either a fully 3D detailed representation or an abstracted CTM (compact thermal model) representation. Here we’ll focus on the latter…<\/p>\n
Being a greasy Mechanical Engineer I still don’t fully understand the difference between SPICE and IBIS models. One thing I think I understand though is that they are both models that behave in the right way without being defined as explicitly as they exist in reality. They are abstractions. From a thermal perspective the most common form of abstraction of a component is based on the electro-thermal analogy of thermal resistors (and more commonly nowadays, capacitors). A thermal IBIS model if you will.<\/p>\n
A thermal resistance has the units of DegC\/Watt. The penalty paid (DegC temperature rise) for the power being dissipated. In other words:<\/p>\n
T_component – T_ambient \/ Power = Resistance<\/p>\n
T_component = (Resistance x Power) + T_ambient<\/p>\n
if you know the resistance, the power being dissipated and the ambient temperature around the component then you can back out a component temperature.\u00a0 That’s assuming of course a single heat flow path from the source (die) to the ambient that can be characterised as a single resistance. Oh, if only life were that simple.<\/p>\n
There are a number of resistance ‘topologies’ that have been proposed to best represent the many and varied heat flow paths in packages. One thing to be aware of, the difference in electrical resistivity between a conductor and a typical dielectric is what, ~10 orders of magnitude, thus keeping the electrical flow exclusively in the conductor. From a thermal perspective the difference in thermal resistance between all objects found within a typical IC package is only about 4 orders of magnitude. Heat therefore tends to spread around in 3D, irrespective of the electrical intention of the various parts that make up a package, thus making it let’s just say ‘difficult’ to collapse those heat flow paths down to interconnected 1D resistors. And you thought electrical engineering was challenging.<\/p>\n
There are three main types of CTM; 1 resistor, 2 resistor and DELPHI. I’ll introduce in each in turn next…<\/p>\n
12th October 2009, Ross-on-Wye<\/p>\n","protected":false},"excerpt":{"rendered":"
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