{"id":22038,"date":"2020-12-17T06:18:29","date_gmt":"2020-12-17T11:18:29","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/simcenter\/?p=22038"},"modified":"2026-03-26T06:34:01","modified_gmt":"2026-03-26T10:34:01","slug":"future-of-thermal-design-electrothermal-modeling-bci-rom-vhdl-ams","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/simcenter\/future-of-thermal-design-electrothermal-modeling-bci-rom-vhdl-ams\/","title":{"rendered":"The future of thermal design – earlier electrothermal analysis"},"content":{"rendered":"\n

I attended a panel discussion several years ago at the SEMI-THERM Thermal Technologies Workshop about the \u2018Future of Thermal Design\u2019. One of the speakers imagined a future where (paraphrased) \u201cElectrical spice files and thermal spice files could be used together for early concurrent electrothermal system design\u201d.  My interpretation of that statement remains that going forward, electrical and thermal systems must be designed as one whenever possible, as continuing to work in electrical and thermal silos would begin to carry more and more inefficiencies, errors, re-work and risk.<\/p>\n\n\n\n

\"The<\/figure>\n\n\n\n

Circuit simulation and thermal design: What are Boundary Condition Independent Reduced Order Models?<\/h2>\n\n\n\n

At the time of the conference mentioned above, an electrical-thermal-spice workflow was simply not practical in a general sense.  While thermal spice files do indeed exist, unlike electrical spice files, they can only be created for use in a single, fixed, thermal environment.  It\u2019s important to note that until only recently, no method had been identified to create a thermal spice file with a known accuracy at any operating power cycle, or even to support multiple heat sources in a device.  The introduction of the thermal netlist export from Simcenter Flotherm 2020.1 (described here<\/a>) solved the accuracy and multi-heat source problem, but the single thermal environment limitation remained until Boundary Condition Reduced Order Models (BCI-ROM) technology was released at Simcenter Flotherm 2020.2.<\/p>\n\n\n\n

Simcenter Flotherm leverages the FANTASTIC1 <\/sup>method to export Boundary Condition Independent Reduced Order Models (BCI-ROMs). These are exportable for electrothermal modeling in the IEEE Standard 1076.1 VHDL-AMS format, making it compatible with many functional schematic circuit simulation tools.  The BCI part of the name is critically important.  It means the model will retain accuracy in any thermal environment.  It is a realization of the accurate, portable, version of the future \u2018thermal spice file\u2019 envisaged by the conference speakers phrase at the start of this blog.<\/p>\n\n\n\n

So what\u2019s possible?  A thermal BCI-ROM in VHDL-AMS format can directly connect to electrical circuit elements.  The thermal circuit shown below will communicate temperature to the electrical circuit element, and the electrical circuit will send power back.  This is not actually a \u2018back and forth\u2019 co-simulation approach.  Thermal and electrical circuits are solved concurrently as they are described in the same language.<\/p>\n\n\n

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A Simcenter Flotherm BCI-ROM in the circuit simulation environment: connecting thermal and electrical circuit modeling<\/figcaption><\/figure><\/div>\n\n\n

Model supply chain and connecting BCI-ROMs<\/h2>\n\n\n\n

The model supply chain is well established for electrical design.  It\u2019s common today to request and receive behavioral models of devices (in spice or VHDL-AMS formats) as part of the functional electrical design process.  These electrical models are portable, i.e., they will interact properly with any other component in the functional schematic and can be consumed by many simulation tools.  The same is now true for thermal models, thanks to the boundary condition independent nature of these thermal BCI-ROMs and their implementation in VHDL-AMS, an IEEE standard format.   Any simulation tool that supports VHDL-AMS can leverage this type of BCI-ROM to predict accurate response in any thermal situation environment modeled.<\/p>\n\n\n\n

A semiconductor vendor for example, can now support their customers by supplying both electrical spice files and thermal BCI-ROMs.  The customer can create a thermal BCI-ROM of the PCB, connect them together with other thermal BCI-ROMs and electrical models to quickly assemble a functional schematic representation of their product that captures all electrothermal behavior.<\/p>\n\n\n

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\"Functional
Functional Schematic representation of electrothermal behavior<\/figcaption><\/figure><\/div>\n\n\n

The availability of an accurate electrothermal functional schematic early in the design process brings together thermal and electrical design to enable concurrent design at the system level.  The electrical design engineer benefits from an understanding from the beginning of how the electrical functionality and performance of the product will be impacted by temperature and temperature differences.  The thermal designer benefits by gaining access to accurate power dissipation values far earlier in the design process, early visibility on what components are likely to need remedial thermal action, and the ability to design power control strategies from the onset. <\/p>\n\n\n\n

Smartphone Power Control, Thermal Throttling – Digital Electronics Example<\/strong><\/h2>\n\n\n\n

Let\u2019s look at an example how this works with Simcenter Flotherm<\/strong>, electronics cooling software, by generating BCI-ROMs from 3D thermal models and then using them in PartQuest Explore<\/strong>, circuit simulation software.  You can try out the electrothermal circuit simulation example in a link below, but first I will take you on a tour of what is included.<\/p>\n\n\n\n

The example model is an electrothermal design of a generic Smartphone, with a power throttling algorithm defined.  This is the same application that my colleague Mike Donnelly wrote about in the past to explain thermal netlists<\/a>, but this time the thermal circuit is built with connected thermal BCI-ROMs instead of a single thermal netlist.<\/p>\n\n\n\n

Processor 3D thermal model and generating a BCI-ROM<\/strong><\/p>\n\n\n\n

Let\u2019s focus first on the processor.  In Simcenter Flotherm, the processor model looks like this:<\/p>\n\n\n

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Simcenter Flotherm processor 3D thermal model – showing heat source zones<\/figcaption><\/figure><\/div>\n\n\n

There are three named heat source zones on the die: CPU<\/strong>, GPU<\/strong>, and Connectivity<\/strong>.  There are two defined boundaries from which heat can exit the model: Top<\/strong> and Bottom<\/strong>. When this Simcenter Flotherm model is converted into a FANTASTIC thermal BCI-ROM and imported into PartQuest Explore Cloud it looks like this:<\/p>\n\n\n

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\"FANTASTIC
BCI-ROM of processor (generated by Simcenter Flotherm) shown in Partquest Explore<\/figcaption><\/figure><\/div>\n\n\n

Each heat source has a thermal connection to carry power and temperature information, as does each defined boundary face.  Note that each boundary face requires a thermal resistance (Rth) to be specified.  More information below.<\/p>\n\n\n\n

Incorporating multiple thermal BCI-ROMs into the electrical circuit simulation model<\/strong><\/p>\n\n\n\n

The BCI-ROM is then connected to the electrical circuit, establishing the power-temperature connection, and also connected to the rest of the thermal circuit.  Each connection for a thermal boundary face requires a user input for thermal resistance between the BCI-ROM and the next thermal object in the circuit.  This is how the Boundary Conditions for the BCI-ROM come into play.  In this example, the Bottom face of the processor is connected directly to the appropriate location on the PCB BCI-ROM with Rth_Bottom = 0.05 K\/W (assuming a small thermal resistance between the bottom of a component and the board is usually reasonable).  The top of the processor also has a boundary face Rth.  This generally could represent a connection to a heat sink, airflow, etc, but in this case it represents a direct connection to the phone casing via a thermal interface material (Rth_Top = 0.2 K\/W) between the processor lid and the casing.<\/p>\n\n\n\n

In addition to the processor, two memory chips are included as thermal BCI-ROMs, and finally the \u2018rest\u2019 of the Smartphone (containing the PCB, battery, display, temperature sensor, and phone casing) is included as another BCI-ROM.  Note that the thermal BCI-ROM boundary faces for the components are connected directly to corresponding PCB BCI-ROM heat sources.  This specifies that heat exiting the components will enter the \u2018PCB and Case\u2019 BCI-ROM at the correct physical location, and then accurately move within that BCI-ROM before arriving at the ambient reference temperature.<\/p>\n\n\n\n

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BCI-ROMs connected to each other and ambient temperature reference<\/figcaption><\/figure>\n\n\n\n

The electrical side of the circuit contains three items of note:<\/p>\n\n\n\n

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  1. \u2018Digital Power\u2019 VHDL-AMS. The digital power model is an abstract representation of the power dissipation behavior of any clocked digital IC. The instantaneous power dissipation is a function of the applied voltage, the clock frequency, the operating state, and the temperature. The user can specify the nominal values for these parameters, and the model dynamically adjusts the power dissipation as they change during transient simulation.<\/li>\n\n\n\n
  2. Operating State Definition.  For this example, the system is Idle for 100 seconds, then in Gaming Mode for 1500 seconds.<\/li>\n\n\n\n
  3. Dynamic Thermal Management (DTM) Controller.  The sampled-data algorithm is attempting to keep the sensor temperature (on the phone casing, just above the processor) between 40 \u00b0C and 45 \u00b0C. It does this by adjusting the global clock rate in a simple manner:\n
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    1. Sensor Temperature is too hot?  Halve the clock frequency<\/li>\n\n\n\n
    2. Sensor Temperature is too cold? Double the clock frequency<\/li>\n<\/ol>\n<\/li>\n<\/ol>\n\n\n\n

      Transient electrothermal circuit simulation power – aware control<\/strong><\/h3>\n\n\n\n

      Transient thermal analysis is and will continue to be more crucial in the future of thermal design.

      In this simulation the DTM controller responds as shown below.  The increased power dissipation from \u2018gaming mode\u2019 at the maximum clock frequency causes the sensor temperature to exceed 45 \u00b0C at ~750 seconds activating thermal throttling control response. the DTM controller halves the frequency in response, dropping the power dissipation and the sensor temperature, and of course dropping the performance of the gaming software at the same time.<\/p>\n\n\n

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      \"Temperature<\/figure><\/div>\n\n\n

      Explore using BCI-ROMs, generated by Simcenter Flotherm, in PartQuest Explore<\/h3>\n\n\n\n

      The PartQuest Explore online simulation model is linked to below.  There are a few parameters (look for the blue boxes) that are available to change directly. <\/p>\n\n\n\n