{"id":1210,"date":"2019-02-11T00:25:14","date_gmt":"2019-02-11T08:25:14","guid":{"rendered":"https:\/\/blogs.plm.automation.siemens.com\/t5\/Simcenter-Blog\/Simcenter-STAR-CCM-2019-1-Plasma-simulations-at-the-edge-of\/ba-p\/565476"},"modified":"2026-03-26T06:11:58","modified_gmt":"2026-03-26T10:11:58","slug":"simcenter-star-ccm-2019-1-plasma-simulations-at-the-edge-of-moores-law","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/simcenter\/simcenter-star-ccm-2019-1-plasma-simulations-at-the-edge-of-moores-law\/","title":{"rendered":"Simcenter STAR-CCM+ 2019.1: Plasma simulations at the edge of Moore\u2019s Law"},"content":{"rendered":"

In 1965 Gordon Moore, co-founder of Intel, noted that the number of transistors in an integrated circuit (IC) doubles every year, and predicted<\/a> this trend would hold for at least a decade. Later the periodicity has been revised, most commonly defined as 18 months, and has been consistently used for long-term planning and target setting for R&D in semiconductor industry. However lately there have been lots of discussions about the probable death<\/a> of Moore’s law, since silicon-based semiconductor size is now approaching physical limits. Learning from history, the clock frequency stalled already ~13 years ago; check out the graph in this blog<\/a> \u2013 although the number of transistors is still increasing the clock frequency stagnated around 4 GHz in 2006. This is due to hitting the \u201cpower wall<\/a>\u201d – the limit where leakage currents and heat production become significant enough to get faulty operation and overheating. Likewise, the transistor size cannot continue to shrink forever due to the finite size of the atom itself. The latest circuit printing technique available today allows for 7 nm structures on the chip. 7 nm – that\u2019s ~70 atoms! Below this size, migration of single atoms may damage the nanostructures of the IC, and quantum effects start to interfere. Thus it is impossible to go much further with similar technology, and the consistent shrinking in transistor size from 1960\u2019s to today, from mm to ~7 nm scale, is about to end. This doesn\u2019t mean technology advancements are over, technologies such as 3D patterning, improved packaging, using materials with higher conductivity, smarter layout and coding, application-specific integrated circuits and far out potentially quantum computing still advances our computational efficiency. But, the era of ever-decreasing transistor size is over. ~7 nm may be the end. <\/span><\/p>\n

What does this have to do with plasma<\/a>, the fourth state of matter<\/a> where electrons and ions roam free? Well, the technology that lets us get to 7 nm is Extreme UltraViolet Litography<\/a> (EUVL), where 7 nm patterns are copied from a template to the wafer by ultraviolet light of 13.5 nm wavelength. The ultraviolet light is produced by photon emissions from a tin plasma. The EUV light is collected by a mirror and guided through the scanner to replicate the template pattern on the wafer. The mirror itself is exposed to the plasma, and is easily damaged by high energy ion impacts<\/a>. Hence reduction of impact rate is highly desirable and any design changes which lowers the impact will extend the life time of the very expensive EUVL equipment. Simulations can aid design through analysis of plasma density, energy and extent. Even in the rest of the semiconductor manufacturing product line, which may consist of hundreds of fabrication steps<\/a>, plasmas play a vital role; Lieberman & Lichtenberg<\/a> noted in 2005 that one-third of the fabrication steps are typically plasma-based(!). Plasmas are used to etch wafers through plasma etching and to deposit materials on the wafer through sputtering physical vapor deposition (PVD) or plasma-enhanced chemical vapor deposition (PECVD).  <\/span><\/p>\n

To support technology development at the edge of validity of Moore\u2019s law, Simcenter STAR-CCM+ adds plasma chemistry simulation capabilities in the upcoming 2019.1 release. This allows you to study electron number density, ion concentration and electron temperature in low temperature plasmas, such as used in EUVL, sputtering PVD and PECVD processes. <\/span><\/p>\n

To be specific, now you can read in any plasma chemistry in standard CHEMKIN\u2122 format in Simcenter STAR-CCM+, and solve the chemistry with the stiff chemistry solver CVODE, which is proven for its robustness and speed<\/a> for combustion simulations<\/a>. <\/span><\/p>\n

For an example see an inductively coupled argon plasma etcher below. The coil in the top of the picture is inducing an electromagnetic field through an alternating current of 13.56 MHz, strong enough to rip electrons off neutral argon atoms. The electrons are accelerated by the electromagnetic field, giving them high enough energy to excite or rip off further electrons of other argon atoms, creating a plasma of excited argon atoms, argon ions, neutral argon atoms, and electrons. The purpose of this plasma is to etch the wafer surface through bombardment of argon ions. <\/span><\/p>\n

The electron energy source from the electromagnetic field is shown on the left-hand side, and the corresponding cloud of free electrons on the right-hand side. The electron density peak is slightly further away from the Quartz crystal than the peak of the Electron energy source field since neutralization of electrons by the surface reduces the number of electrons close to the crystal. <\/span><\/p>\n

\"Image1_Design1_ElectronEnSource_NbrDens.png\"<\/span><\/span><\/p>\n

The corresponding cloud of <\/span>a<\/span>rgon ions, which <\/span>a<\/span>re used to etch the surf<\/span>a<\/span>ce, is shown in the picture below. The <\/span>a<\/span>rgon ion cloud is very simil<\/span>a<\/span>r in sh<\/span>a<\/span>pe to the electron number density since the electrons induce the ions.<\/span><\/span><\/p>\n

\"Image2_Design1_Argon_NbrDensElectron.png\"<\/span><\/p>\n

The <\/span><\/span>a<\/span>rgon chemistry<\/span><\/span><\/a> used in this simul<\/span>a<\/span>tion includes three re<\/span>a<\/span>ctions; <\/span>a<\/span>rgon excit<\/span>a<\/span>tion, ioniz<\/span>a<\/span>tion <\/span>a<\/span>nd stepwise ioniz<\/span>a<\/span>tion. <\/span><\/span>The momentum tr<\/span>a<\/span>nsfer re<\/span>a<\/span>ctions <\/span>a<\/span>re included in the model implicitly.<\/span><\/span><\/span><\/p>\n

\"Image4_Reactionscheme.png\"<\/span><\/span><\/span><\/p>\n

This is a somewhat simplified scheme. Extended schemes or schemes for other species can be obtained from Quantemol<\/a>, an expert company within the field of plasma chemistry, whom we rely on for help and guidance. <\/span><\/p>\n

The etching profile at the wafer surface needs to be as uniform as possible. To achieve that four different designs are studied: <\/span><\/p>\n