{"id":762,"date":"2024-12-16T09:39:16","date_gmt":"2024-12-16T14:39:16","guid":{"rendered":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/?p=762"},"modified":"2026-03-27T09:12:18","modified_gmt":"2026-03-27T13:12:18","slug":"3d-ic-design-solutions-2024-year-in-review","status":"publish","type":"post","link":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/12\/16\/3d-ic-design-solutions-2024-year-in-review\/","title":{"rendered":"3D IC design solutions: 2024 \u2013 Year in review"},"content":{"rendered":"\n<p>Welcome to a look back at a landmark year in 3D IC technology \u2014 2024 was nothing short of revolutionary! Siemens EDA has been at the forefront of 3D IC, steering the course from the pivotal moments at the Chiplet Summit to the insightful sessions at the Siemens 2024 User2User conference. A crown jewel of the year was undoubtedly the announcement of Innovator3D IC, our new multiphysics cockpit designed for unparalleled 3D IC design verification and manufacturing. As we reflect on a year where Siemens EDA has continued to sculpt the technological landscape of tomorrow for 3D IC, dive into this post to discover how we&#8217;re not just following the future but creating it.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>2024 Highlights: Siemens EDA redefined the future of 3D IC technology<\/strong><\/h2>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Revolutionary announcement:<\/strong><\/h2>\n\n\n\n<p><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/07\/31\/siemens-introduces-innovator3d-ic-a-comprehensive-multiphysics-cockpit-for-3d-ic-design-verification-and-manufacturing\/\">Siemens introduces Innovator3D IC \u2013 a comprehensive multiphysics cockpit for 3D IC design, verification and manufacturing<\/a><\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-large is-resized\"><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/07\/31\/siemens-introduces-innovator3d-ic-a-comprehensive-multiphysics-cockpit-for-3d-ic-design-verification-and-manufacturing\/\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"576\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/64\/2024\/07\/siemens-innovator3d-ic-newsroom-01-1280x720-1-1024x576.jpg\" alt=\"\" class=\"wp-image-568\" style=\"width:667px;height:auto\" srcset=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/64\/2024\/07\/siemens-innovator3d-ic-newsroom-01-1280x720-1-1024x576.jpg 1024w, https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/64\/2024\/07\/siemens-innovator3d-ic-newsroom-01-1280x720-1-600x338.jpg 600w, https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/64\/2024\/07\/siemens-innovator3d-ic-newsroom-01-1280x720-1-768x432.jpg 768w, https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/64\/2024\/07\/siemens-innovator3d-ic-newsroom-01-1280x720-1-395x222.jpg 395w, https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/64\/2024\/07\/siemens-innovator3d-ic-newsroom-01-1280x720-1-900x506.jpg 900w, https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/64\/2024\/07\/siemens-innovator3d-ic-newsroom-01-1280x720-1.jpg 1280w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/a><\/figure><\/div>\n\n\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\">\n<p><em>Siemens already had the most comprehensive portfolio of semiconductor packaging related technologies available as part of Siemens Xcelerator, by combining these with Innovator3D IC we enable customers to achieve the realization of more-than-Moore.\u201d<\/em><\/p>\n<cite><em>AJ Incorvaia, Sr. VP of Electronic Board Systems at Siemens Digital Industries Software<\/em><\/cite><\/blockquote>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Significant events &amp; milestones:<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/chipletsummit.com\/2024-proceedings-access\/\" target=\"_blank\" rel=\"noopener\">Chiplet Summit<\/a>: Access the 2024 proceedings<\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/09\/18\/join-us-at-the-tsmc-2024-na-oip-ecosystem-forum\/\">TSMC 2024 NA OIP Ecosystem Forum<\/a>: Access the full list of Siemens EDA papers<\/li>\n<\/ul>\n\n\n\n<p>    <strong>User2User 2024 conference insights: Watch the session recordings on demand!<\/strong><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/11\/05\/user2user-2024-pioneering-semiconductor-reliability-automotive-apps-imecs-canary-chip\/\">Pioneering semiconductor reliability automotive apps \u2013 <strong>imec\u2019s<\/strong> Canary chip<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/10\/15\/user2user-2024-customer-specific-solutions-with-siemens-eda-tools-sysberry-gmbh\/\">Customer-specific solutions with Siemens EDA tools: <strong>Sysberry GmbH<\/strong><\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/09\/27\/user2user-2024-meeting-future-performance-demands-through-packaging-chipletz\/\">Meeting future performance demands through packaging: <strong>ChipletZ<\/strong><\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/09\/17\/user2user-2024-silicon-photonics-to-integrate-chiplets-swissbit\/\">Silicon photonics to integrate chiplets: <strong>Swissbit<\/strong><\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/09\/11\/user2user-2024-chiplets-for-future-automotive-application-fraunhofer\/\">Chiplets for future automotive application: <strong>Fraunhofer<\/strong><\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/08\/12\/user2user-2024-emib-based-advanced-packaging-flow-intel-foundry\/\">EMIB based advanced packaging flow \u2013 <strong>Intel Foundry<\/strong><\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/07\/30\/user2user-2024-xpd-xsi-pdk-design-enablement-beyond-xpedition-templates\/\">xPD xSI PDK design enablement \u2013 Beyond Xpedition templates &#8211;<strong> Siemens<\/strong><\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/07\/15\/user2user-2024-assembly-verification-flow-for-silicon-interposers\/\">Assembly verification flow for silicon interposers &#8211; <strong>Broadcom<\/strong><\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/06\/25\/user2user-2024-advanced-physical-verification-flows-for-3d-ics\/\">Advanced physical verification flows for 3D IC\u2019s &#8211; <strong>Microsoft<\/strong><\/a><\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>White papers:<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/resources.sw.siemens.com\/en-US\/technical-paper-parasitic-extraction-technologies-for-advanced-node-and-3d-ic-design\" target=\"_blank\" rel=\"noopener\">Parasitic extraction technologies: Advanced node and 3D-IC design<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/resources.sw.siemens.com\/en-US\/technical-paper-a-deep-dive-into-hdap-lvs-lvl-verification\" target=\"_blank\" rel=\"noopener\">A deep dive into HDAP LVS\/LVL verification<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/02\/21\/taking-2-5d-3d-ic-physical-verification-to-the-next-level\/\">Taking 2.5D\/3D IC physical verification to the next level<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/resources.sw.siemens.com\/en-US\/white-paper-innovative-way-to-functionally-verify-heterogeneous-package-connectivity\" target=\"_blank\" rel=\"noopener\">New innovative way to functionally verify heterogeneous 2D\/3D package connectivity<\/a><\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Infographics:<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/07\/16\/discover-how-ai-is-changing-the-nature-of-semiconductor-design\/\">Discover how AI is changing the nature of semiconductor design<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/07\/23\/the-role-of-ai-infused-eda-solutions-for-semiconductor-enabled-products-and-systems\/\">The role of AI-infused EDA solutions for semiconductor-enabled products and systems<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/08\/05\/the-multi-physics-challenge-known-good-die-may-not-behave-in-3d-ic-as-stand-alone\/\">The multi-physics challenge: Known good die may not behave in 3D IC as stand alone!<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/08\/08\/why-is-a-comprehensive-workflow-essential-for-chiplet-design-and-todays-3d-ic-architectures\/\">Why is a comprehensive workflow essential for chiplet design and today\u2019s 3D IC architectures?<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/08\/14\/the-evolution-of-machine-learning-ml-in-the-physical-design-and-verification-of-semiconductor-packages\/\">The evolution of machine learning (ML) in the physical design and verification of semiconductor packages<\/a><\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>eBook<\/strong>:<\/h2>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/resources.sw.siemens.com\/en-US\/e-book-ic-package-physical-design-best-practices\/?ref=EBS_blog\" target=\"_blank\" rel=\"noopener\">IC package physical design best practices<\/a><\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Videos:<\/strong><\/h2>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/01\/11\/workflows-for-tackling-heterogeneous-integration-of-chiplets-for-2-5d-3d-semiconductor-packaging\/\">Workflows for tackling heterogeneous integration of chiplets for 2.5D\/3D semiconductor packaging<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/webinars.sw.siemens.com\/en-US\/taking-3d-ic-heterogenous-integration-mainstream\/\" target=\"_blank\" rel=\"noopener\">Taking 3DIC heterogeneous integration mainstream<\/a><\/li>\n\n\n\n<li><a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/2024\/10\/21\/ee-times-fireside-chat-linking-design-to-manufacturing-for-a-sustainable-semiconductor-future\/\">EE Times Fireside chat: Linking design to manufacturing for a sustainable semiconductor future<\/a><\/li>\n<\/ul>\n\n\n\n<blockquote class=\"wp-block-quote is-layout-flow wp-block-quote-is-layout-flow\">\n<p><em>The way the industry\u2019s going \u2013 when we look at the tools and the methodologies that we need \u2013 it\u2019s starting to move from just talking about semiconductors to talking about entire systems.<\/em>&#8220;<\/p>\n<cite>Michael Munsey, VP at Siemens EDA<\/cite><\/blockquote>\n\n\n\n<h2 class=\"wp-block-heading\"><strong>Dive deeper and discover more!<\/strong>\u00a0<\/h2>\n\n\n\n<p>Don&#8217;t miss out on the cutting-edge insights that are shaping the future of 3D IC technology.&nbsp;<strong>Explore, learn, and leverage these groundbreaking resources now<\/strong>&nbsp;to stay ahead in the semiconductor industry.<\/p>\n\n\n\n<p>As we set our sights on 2025, we&#8217;re dedicated to continuing our tradition of innovation and excellence. Prepare to pioneer the next wave of technological advancements with Siemens EDA and stay at the forefront of the 3D IC semiconductor industry.<\/p>\n\n\n\n<p>To learn more about Siemens EDA 3D IC solutions, visit the&nbsp;<a href=\"https:\/\/eda.sw.siemens.com\/en-US\/ic-packaging\/3d-ic-design\/\" target=\"_blank\" rel=\"noreferrer noopener\">3D IC Homepage<\/a><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Read a case study: <a href=\"https:\/\/resources.sw.siemens.com\/en-US\/case-study-etri-and-amkor?bc=eyJwYWdlIjoiNVg2ZVpPdlliY2Ixd2ZHalNIRklkeCIsInNpdGUiOiJlZGEiLCJsb2NhbGUiOiJlbi1VUyJ9\" target=\"_blank\" rel=\"noopener\">Smarter, faster, greener AI with 3D IC chiplet advanced packaging<\/a><\/li>\n\n\n\n<li>Explore a curated selection of <a href=\"https:\/\/content.sw.siemens.com\/3d-ic\" target=\"_blank\" rel=\"noopener\">3D IC assets<\/a><\/li>\n\n\n\n<li>Access the <a href=\"https:\/\/eda.sw.siemens.com\/en-US\/ic-packaging\/3d-ic-design\/3d-ic-resources\/\" target=\"_blank\" rel=\"noopener\">3D IC Resource Library<\/a><\/li>\n\n\n\n<li>Visit the <a href=\"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/\">3D IC blog site<\/a> to learn more about the latest in 3D IC<\/li>\n\n\n\n<li>Listen to the <a href=\"https:\/\/blogs.sw.siemens.com\/podcasts\/category\/3d-ic\/\">3D IC Podcast<\/a><\/li>\n<\/ul>\n\n\n\n<p><a href=\"https:\/\/resources.sw.siemens.com\/en-US\/3d-ic-design-contact-us?bc=eyJwYWdlIjoiNVg2ZVpPdlliY2Ixd2ZHalNIRklkeCIsInNpdGUiOiJlZGEiLCJsb2NhbGUiOiJlbi1VUyJ9\" target=\"_blank\" rel=\"noopener\">Contact us<\/a> to learn more about our 3D IC design solutions<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Welcome to a look back at a landmark year in 3D IC technology \u2014 2024 was nothing short of revolutionary!&#8230;<\/p>\n","protected":false},"author":71824,"featured_media":767,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1,377],"tags":[473,475,477,482,533,471],"industry":[103,106],"product":[535,368],"coauthors":[509],"class_list":["post-762","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news","category-learning-resources","tag-3d-ic","tag-chiplet","tag-heterogeneous-design","tag-ic-packaging","tag-innovator3d-ic","tag-semiconductors","industry-electronics-semiconductors","industry-semiconductor-devices","product-innovator3d-ic","product-xpedition-ic-packaging"],"featured_image_url":"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/64\/2024\/12\/3DIC-EOY-2024-1280x720px.jpg","_links":{"self":[{"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/posts\/762","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/users\/71824"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/comments?post=762"}],"version-history":[{"count":5,"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/posts\/762\/revisions"}],"predecessor-version":[{"id":777,"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/posts\/762\/revisions\/777"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/media\/767"}],"wp:attachment":[{"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/media?parent=762"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/categories?post=762"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/tags?post=762"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/industry?post=762"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/product?post=762"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.sw.siemens.com\/semiconductor-packaging\/wp-json\/wp\/v2\/coauthors?post=762"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}