What is the solution?<\/h2>\n\n\n\n
The answer is to use a Work-In-Progress\u00a0(WiP)\u00a0data management\u00a0system to manage\u00a0all the design and design IP data, revision control every piece of data, record its origin\u00a0and who last touched it.\u00a0\u00a0Now\u00a0WiP\u00a0is NOT Product-Lifecycle-Management (PLM)\u00a0WiP\u00a0is used during design to ensure that the right data is in the design\u00a0and provides transparent traceability on where that data came from, when and who last touched\/edited it. It can also provide access rights to data\u00a0and the various levels of a\u00a0at multiple levels of granularity, such as ecosystem partners\u00a0such as suppliers, OSATs or foundries,\u00a0designers\u00a0or design teams, geographic locations\u00a0etc.\u00a0<\/p>\n\n\n
![\"A](\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/64\/2026\/03\/i3ddm.png\")
<\/figure><\/div>\n\n\nEnable collaboration<\/h2>\n\n\n\n
Semiconductor package design requires co-design of multiple concurrent sub-design elements such as dies, interposers, bridges, packages, PCB \u2013 each element may be designed in different tools and\/or different geos yet require access to common source data. ECO\u2019s can come from customer and must waterfall to each element being designed with each design team. ECO\u2019s often occur when changes in one design element forces changes in other sub-designs of the package. Example: A change in Die bump position requires changes to interposer and the Si bridge design elements. <\/p>\n\n\n\n
With Innovator3D IC Data Management\u00a0(i3DDM)\u00a0you\u00a0can set,\u00a0pull\u00a0and track ECO\/design status across each sub-design to help manage\/tracking status of the final\u00a0semiconductor package\u00a0design\u00a0so signoff\u00a0is a reliable and robust process.\u00a0<\/p>\n\n\n\n
For more information on i3DDM download the brochure that can be found here: <\/p>\n\n\n\n