From chips to silicon destiny: Siemens’ Piyush Sancheti on the next wave of 3D IC

Tova Levy (00:02.936): Welcome to the season three finale of the 3D IC podcast. I’m Tova Levy, and if you’ve been with us through this season, you know we’ve covered a lot of ground. We’ve explored reliability challenges, IP development complexities, the role of AI in design, data management nightmares, advanced packaging breakthroughs, and the critical role EDA vendors play in making all of this possible. But here’s the thing. All of those conversations, as deep and technical as they were, have been pieces of a much larger puzzle. And as we wrap up the season, it’s time to step back and ask the bigger questions. Questions like, is 3D IC actually the future? Or is it just one piece of a much bigger transformation? What are companies actually learning from shipping these products today? How does geopolitical reality reshape the 3D IC roadmap? And where do we go from here? These are the questions that matter most to the people building this ecosystem. The engineers, architects, leaders making decisions that affect thousands of design teams. That’s why, for our season finale, we’re diving deep into the current state and future of 3D IC with someone uniquely positioned to answer these questions. He spent his career of nearly three decades architecting next generation semiconductor solutions. He’s held senior engineering and product roles at some of the industry’s most innovative companies. And today, as VP of Central Engineering Group at Siemens EDA, he’s responsible for driving end-to-end 3D IC solutions built on Siemens entire tool portfolio, from chip design to package analysis to system integration. Piyush Sancheti, welcome to the 3D IC podcast.

Piyush Sancheti (Siemens) (01:50.704): Thank you, Tova, and nice to talk to you today.

Tova Levy (01:55.235): Alright, so let’s start with what’s actually shipping now. Companies are using 3D ICs in data centers, mobile devices, AI accelerators. What have early adopters actually learned? What surprised them?

Piyush Sancheti (Siemens) (02:11.770): Yeah, 3D IC is definitely, you know, beyond the sort of the theoretical research phase, and we are seeing many real products that are being shipped out in the market using 2.5D and 3D technologies. You know, 2.5D has been mainstream for almost a decade now, where we see logic and high bandwidth memory sitting next to each other on silicon or organic interposer, and many products are out in the market today that are using technology. Technologies in that realm. Silicon Interposer, you know, in particular, is widely used in high performance compute and AI accelerators, whereas we see the adoption of more of the organic interposers in the mobile and edge AI applications, where the compute needs and the bandwidth needs are not quite as severe, but obviously the economics of it are more favorable with organic interposer. And then there is the true 3D, where we are headed towards die stacks using hybrid bonding and face-to-face configurations or micro bumps in face-to-back configurations. And they’re already being used for HBM stacking today, but we see an increased move in the industry towards more of the logic die stacking. The benefits obviously are performance, power, and you know the compact form factor, but it obviously also comes with its own challenges. So to your question about key learnings. One of the most important things the companies that have already done 2.5D and 3D designs have figured out is that linear flows for traditional SOC design in a monolithic design no longer scale when it comes to designing 3D IC systems. You know, in the past we had a very convenient approach where the chip design was done by one company and the package design was handled by another company, and the package company dealt with all of the assembly and testing tasks as sort of very distinct step that happened much later.

Piyush Sancheti (Siemens) (04:19.418): What we’re seeing, or what the customers have learned along the way also is that electrical and multi-physics considerations like power, signal integrity, power integrity, electromigration, IR drop, thermal, thermo mechanical stress are much more severe when we get into these multi-die systems where you’re packing multiple dies in a close proximity. The other aspect I think companies have recognized is the manufacturing process and getting high yield is significantly more complex when you are dealing with these multi-die systems. And I guess the last part we’ve also seen happen, and customers have realized, is that the ecosystem is much more diverse because you have chip companies, you have the packaging houses and foundries all working in a closed ecosystem whereby you can actually put these systems out together. So, yes, definitely we’re passing the research phase, but also we’re recognizing that there are many challenges and learnings along the way to make a 3D IC system happen.

Tova Levy (05:53.648): So it’s kind of like the theory is colliding with the manufacturing reality, right? And that brings us to the next question, which is economics. Is 3D IC necessarily the right move for every company? And how do you even make that decision? You know, when does the ROI make sense?

Piyush Sancheti (Siemens) (06:12.096): Yeah. No, definitely. I mean that’s you know, as we call it, this is an economic decision. And there’s a technology and then there’s the economics of the technology. So at a very sort of high level, there are two forks in the road, right? For a lot of companies the decision first level decision is to whether go 3D IC or not. And then if you decide that you want to do 3D IC, then you know which type of technology that you use? And you know, we’re using 3D IC as sort of the umbrella, but there is obviously all these 2.5D technologies where you’re doing side-by-side chips versus full 3D stacks. So there is no magic formula to it. To a large degree depends on the end market and the economic drivers for that market. You know, for example, again, for AI and high performance compute, performance is king, and you want to be able to do as much compute as possible, with obviously the limitations of what you can build in a monolithic SOC, right, with the reticle limits and such. So for those class of customers, they have already been designing 3D IC systems, starting with 2.5D. And we see a lot of products out in the marketplace today that are using chiplet-based systems for those markets. What we also see is a lot of the companies that were in the consumer electronics or physical AI or automotive space, they are looking at multi-die systems or 3D systems purely from a cost and benefit equation. And you know therein lies some of the challenges of ensuring that your system requirements are met at the same time you know you can deal with the manufacturing complexities and having to deal with a bigger ecosystem when doing 3D ICs. But that that definitely we see a trend in in the consumer electronics and and edge AI companies that are getting into multi-die systems. And there are trade-offs involved in whatever technology that you choose. So I mean in one way to think about it is nothing is for free. Every such gain that you get by doing 3D ICs also comes with the cost aspects of it and the new complexities and challenges that you have to face, both from a design standpoint as well as from a manufacturing standpoint.

Tova Levy (08:48.047): So it’s not a one size fits all and it really depends on your on the market you’re in. But there is another factor that’s shaping these decisions now and that’s geopolitics, right? In the old world you picked one foundry, one OSAT, but in 3D IC it’s a much more fragmented world and so how does that affect design and manufacturing?

Piyush Sancheti (Siemens) (09:10.707): Yeah, absolutely. I mean you like you said, you know, the equation was much simpler if you were doing a monolithic system. 3D IC obviously requires a broader ecosystem where, but also it has the benefit of being able to leverage the ecosystem much more effectively. So in the past, you know, you picked your supplier for the chip and the packaging, and you are pretty much locked into that sort of ecosystem. With 3D IC, you could potentially go to you know multiple suppliers with their respective expertise in a certain market segment and that way you are able to pick sort of the best in class in different market segments. The other advantage, obviously, being the fact that you don’t necessarily need to invest in advanced technology for all aspects of your system. You know, your compute may be on one process node, your memory could be on a different process node, you could have analog mixed signal components that could potentially use a more mature node. So that’s kind of the advantage that you get. You are now relying on a much broader ecosystem. The other thing we see happening here is the lines between foundry and OSAT companies is blurring. With advanced packaging, you know, you see more of the investment from traditional foundries getting into package design. I mean, Intel’s EMIB and EMIB-T is a prime example where they are doing the silicon embedded you know interposers, and that allows them to actually provide a much more holistic solution to their customer.

Piyush Sancheti (Siemens) (10:59.645): And that’s one of the things we see is now, you know, we see foundries are now able to collaborate in ways with their end customers in ways that were not seen before. From a geopolitical standpoint, the advantages are that you have more diverse choices. So if there is something that has a national interest involved in it, you could potentially go a different path. But also if you’re really looking for diversity and the broad ecosystem, you have the benefit of engaging multiple different suppliers and partners. So definite advantages and disadvantages from a supply chain and a geopolitical risk standpoint.

Tova Levy (11:43.544): Right. So that’s like you know, it’s making supply chain complexity even more complex. But you know, at the end of the day, it ultimately comes down to people, right? And there there’s a massive cultural shift. Like what does it actually take organizationally for a company to be ready for a 3D IC? What is that cultural shift that’s required?

Piyush Sancheti (Siemens) (12:11.637): Yeah. 3D IC design is very multidisciplinary. We just talked about the ecosystem diversity, but even within a design company, you have to bring multiple disciplines together. You know, in the past it was primarily electrical engineers that designed chips. But now we are seeing with all the multi-physics issues that you have to address in a 3D IC system, a lot of the mechanical engineering disciplines now have to work closely with electrical engineers.

Tova Levy (12:20.621): Yeah.

Piyush Sancheti (Siemens) (12:45.439): So putting a 3D IC system is not just about doing a chip, but you’re actually putting a physical system. So you have mechanical engineers, material science people need to get involved because you have different packaging choices. So all these multi physics issues are bringing electrical, thermal, mechanical issues, and they need to iterate together. So it’s not a case of you just bring these people together and they work. They actually have to work together and they have to have a lot of exchange of information because these issues are interlinked. And for that those reasons, you know, we we see that that organizationally companies have to become much more flexible in bringing these disciplines together. Another thing that’s happening in our industry is the notion of digital twins where you can actually capture the information at one stage of the design process and and create these digital twins that are sort of like a surrogate model of the actual physical device or system that you’re putting together. And that those can then be handed over to the next person or next team in the supply chain. And that also creates more the need for collaboration between these different teams. From a talent standpoint, you know, there is there is all the the data that we we see is, you know, one of the numbers I’ve heard recently is that there’s gonna be about a one million engineer shortage in the foreseeable future for designing you know chips and systems. And that that is a scary number, right? I mean, the talent gap won’t will Yeah, exactly. So.

Tova Levy (14:16.909): Yeah. Mm-hmm.

Tova Levy (14:21.827): Yeah, it’s quite the shortage.

Piyush Sancheti (Siemens) (14:26.323): The good news there I guess is that we see AI can can play a significant role in bridging that talent gap, especially helping early career engineers become much more productive with AI-assisted design, tool orchestration, and the simplification of the overall design process that AI can enable. So you have we we definitely see that there is going to be a a major change in the engineering culture in the companies that are designing multi-die systems, but also we see that you know from a development standpoint, there’s gonna be more and more adoption of AI to help sort of bridge that gap.

Tova Levy (15:16.089): Yeah. What you mentioned earlier about having to like bridge gaps between teams and like breaking those silos, that’s been mentioned a lot on this season of the podcast. And I’m also thinking about something that was mentioned I think this was in the previous season, that often teams have a completely different language and sometimes, you know, bridging even just the language gaps, that in itself is a challenge. So as you said, tools come in here to help us and that’s where EDA has a very unique role to play. From Siemens perspective, how does EDA enable this kind of integrated multidisciplinary work?

Piyush Sancheti (Siemens) (16:30.069): So I’m sure you’ve heard this term before in previous discussions as well. You know, STCO or system technology co-optimization. It’s being brought about in the context of 3D IC in many forums. But as I see it, it’s not just a four-letter acronym, but a fundamental shift in the overall design philosophy and the required tooling and methodology around it. You know, back to the traditional monolithic or 2D design, it was essentially a linear flow. You did your design planning and authoring, implementation verification, and sign-off, you know, well-defined steps. But a lot of the tasks and decisions like chip packaging, multi-physics, and testing were all downstream activities. And we talked about the delineation between design companies and foundries and OSAT. 3D ICs require that STCO, which is essentially a lot of these downstream tasks, must be considered very early in the design cycle. This the design of the overall system, the chiplets, the interposer, and substrate must all be done as a co-development and optimization cycle. And there’s a significant emphasis on early design planning and prototyping. So you make intelligent decisions in partitioning the design into chiplets, into SIP-level planning, before the actual implementation starts. So STCO is all about sort of doing a shift left to enable design space exploration and what-if analysis much earlier in the design cycle. And this is something that we as Siemens are very focused on in providing a unified cockpit.

Piyush Sancheti (Siemens) (18:22.877): Which has a full view of your entire 3D system. And back to the die chiplets, interposers, bridges, all the components that make the whole entire 3D IC system, you need a cockpit that has a full view of this and has the ability to essentially capture each stage of the design evolution while maintaining that cohesive view of the overall system. Related to it, and as we talked about the multi-physics issues becoming more prevalent, this cockpit has to have the ability to also allow the user to launch these multiple verification steps throughout the design evolution. You know, this whole notion of doing design and then validating it as an afterthought or as a next step is kind of falling apart. So you need to be able to do design and verification in a continuous loop throughout the entire design cycle.

Tova Levy (19:21.412): Mm-hmm.

Piyush Sancheti (Siemens) (19:29.268): The other aspect that’s becoming more interesting is the overall management of the design data itself. You know, in it just with 2D designs, there were a lot of different design sources, formats, file versions. But when you get into 3D IC systems, you actually need a complete system that allows you traceability, security, the approvals required, change management. These are some of the things that become that much more important when you are dealing with a very diverse ecosystem, both inside the company as well as your third-party suppliers or vendors. Again, AI will play a significant role here in that, you know, a 3D IC innovation, especially as I talked about this whole notion of early sta early phases of design exploration. We see AI play a significant role in helping drive, you know, natural language interactions and reasoning at the early stages, do the tool orchestration across the flow, and then be able to do intelligent design space exploration and optimization using machine learning techniques. So this whole notion of STCO can be supercharged by the the adoption of AI as part of your overall system.

Tova Levy (20:53.881): Yeah. And Siemens recently also announced the an an an expanded partnership for AI. Can you expand on that a bit?

Piyush Sancheti (Siemens) (21:05.363): Yeah, so this was an expansion of our partnership with NVIDIA. We announced it at CES twenty twenty-six in January. There are two major aspects to it. One is how to accelerate the portfolio, including AI native electronic, AI native simulation, electronic design, AI native simulation, as well as AI driven manufacturing and supply chain management. So you know, Siemens obviously has a pretty broad portfolio beyond EDA, and this partnership really expands the adoption of AI across the entire portfolio between the two companies. The second aspect of it is you know GPU acceleration. You know, we’ve seen GPUs play a significant role in AI inferencing and model training. But now we see an opportunity to similarly accelerate EDA tools and our broader simulation portfolio. So really this partnership between Nvidia and Siemens is really to see how we can adopt more of the AI technology for chip design, as well as how to get more acceleration and faster throughput on our tools. This is an exciting opportunity and something that we are looking forward to expanding as we go along.

Tova Levy (22:29.327): Yeah. So EDA is basically the glue that connects all of these different disciplines, right? Meanwhile we’re also seeing another shift, and that is that traditional chip companies are kind of moving up the stack while system companies are moving down into custom silicon design. So what is driving this shift?

Piyush Sancheti (Siemens) (22:55.049): Yeah. I mean for many customers, you know, 3D IC is not the end goal. You know, a lot of the companies that we’re engaged with are system companies where their end product is a physical device or an automobile. So it’s kind of interesting to see that companies that you know 10 years ago had really no connection to chip design, they may be consumers of chips, but they were not involved in chip design, suddenly are now focused on building their own silicon. And this is being driven by a couple sort of major factors in that one software is is driving silicon. You know, in the past, we kind of had this notion that software and silicon were sort of two different entities, and they the the design of the silicon and the design of the software were not really necessarily connected. So we are now seeing a lot of the system houses that were traditionally focused more on the end system or the software now doing custom silicon because that is something that helps them differentiate in the marketplace. So there’s this whole stack of you know beyond 3D IC, you get into PCB, the rack, the data center, and eventually even the power grid. We have an example of one of our customers who’s working with a power grid supplier in Europe where they want to be able to manage the overall power consumption of the data center when the power grid is you know in peak demand stages. So this this whole notion of co-optimizing not just your chip or your 3D IC system, but being able to co-manage at the macro level is something that is very interesting, right?

Tova Levy (24:51.065): Yeah.

Tova Levy (24:51.065): Do you have any like real life examples of this shift that you can share with us?

Piyush Sancheti (Siemens) (26:59.497): Yeah, I mean in fact, you know, it’s out in the public, Meta launched MTIA, Meta Training and Inferencing Accelerator. That was a couple of years ago, where they essentially are building a family of chiplet-based systems to efficiently power their AI recommendation system and manage generated work AI workloads. And this is for specific applications like Instagram, WhatsApp, and Facebook. So this is this is a growing trend we see where system houses are commissioning custom silicon projects that are very, very specific to an application or a very specific workload. And that is a trend we see that will continue to grow as we become more, everybody becomes more of a system thinker, and silicon becomes an integral part of their system deliverables. Another example in the automotive space is the companies like Tesla, who’s designing their next generation Dojo 3 AI training supercomputer, which is leveraging chiplets that they themselves are designing. But here is another example of a system company or an automotive company essentially taking control of their own silicon destiny by commissioning such projects. So this whole notion of vertical integration, where you not only are delivering the software or the entire physical system, but also controlling your silicon supply chain is something that we see increasingly more prevalent in the industry.

Tova Levy (28:42.223): Yeah. And that kind of ties back a bit to what we said about geopolitical changes, right? Because when you have more control of your entire stack and the whole supply chain, you have better control, you know, when having to deal with geopolitical shifts. So looking ahead, the next three to five years, what excites you most and what do you think will be the biggest breakthroughs?

Piyush Sancheti (Siemens) (29:07.562): Mm-hmm.

Piyush Sancheti (Siemens) (29:12.511): Yeah. I mean definitely at a macro level, you know, this notion of 3D IC systems allowing you to do hyper integration is exciting to the industry at large because it allows us to drive the next level of innovation, the next level of scaling. But in terms of kind of what’s happening in the 3D IC space, we see a lot of activity with you know many new avenues being explored, whether that’s new device types, new material types, new heterogeneous integration techniques, and also some new end markets that are you know adopting 3D IC. I mean, as I mentioned at the beginning, for the large part, in the last five years, the adoption of multi-die systems has been driven by the AI and the HPC market. But we we do see that this will scale into other industries as well. So to give you some examples of what’s happening in the industry and what will be kind of the next innovation, one of the areas we see is integrated photonics. You know, I mean, historically, chips have been all electrical, but now we see this notion of co-packaged optics where companies are embedding optical engines inside of 3D systems. This was not possible when we were doing monolithic SOCs because optical systems have completely different physics behind it. But the benefit there is they offer lower power, lower latency, lower signal loss over long paths, and higher bandwidth density. So as we get into sort of this notion of more capacity, more performance, optical provides a new pathway. And of course, like I said earlier, nothing’s for free. And if you embed an optical engine into a what’s otherwise predominantly a CMOS-based electrical system it creates new challenges from overall manufacturing and test standpoint reliability you know one of the one of the advantages of 3D IC is hyper integration the there is actually another side to that same coin in that more integration you have, the more risk, right? Because now it only takes one part to fail for the entire system to sort of fall apart, right? So that’s that’s one area. We also see new materials emerge, like you know, companies are now exploring glass as a replacement for organic or silicon interposers.

Tova Levy (31:57.306): Right.

Piyush Sancheti (Siemens) (31:58.249): Glass has benefits in terms of being more mechanically stable, but it again comes with the complexities of managing the overall manufacturing process, being able to you know reliably dissipate heat and such. So there there are challenges with with going new materials, but clearly companies are interested in that aspect. Other areas we see from a 3D IC scaling standpoint is this notion of wafer scale chips, where companies, you know, where there was a a fairly public announcement from Cerebras who went public not long ago. they have been doing wafer scale chips but where basically you are essentially doing one giant, you know, dinner plate size processor out of an entire wafer. So instead of instead of doing discrete systems or chips, you essentially scale an entire processing unit on a on a wafer, and that essentially eliminates the off-chip network latency and keeps the entire AI models and the SRAM pools in on a single piece of silicon. So that’s exciting because now the industry is sort of going from you know the packaging chips or chiplets to actually doing complete wafer scale control.

Tova Levy (32:56.068): Right.

Piyush Sancheti (Siemens) (32:57.715): Compute. So that’s that’s another area that we see a lot of excitement in the industry around you know wafer scale systems. Yet another example is wafer on wafer, where instead of sort of doing chip stacks, you’re actually doing a wafer stack. So think of it as sort of like 3D IC on steroids, because now you have stacks of chips that are in a single wafer, but now by being able to stack another wafer on top of it, you essentially creating multiple stack levels in in a 3D IC.

Tova Levy (33:27.538): Yeah. That sounds like a massive manufacturing challenge.

Piyush Sancheti (Siemens) (34:04.775): It absolutely is. You know, in manufacturing, it takes one speck of dust to ruin an entire wafer, right? And now if you have a system that is stacking multiple wafers, you could potentially ruin the entire lot, right? By having a single defect in the and it traditionally, you know, companies relied on getting you know anywhere from 70 to 90 percent wafer yield especially at advanced nodes. I think once you get into mature nodes, that yield goes even higher. But you are relying on the fact that okay, even if you have some defective parts, you’re not losing the entire wafer. But when you get into these wafer scale integrations, the manufacturing risk and the potential yield loss can be significant.

Tova Levy (34:47.994): Yeah.

Piyush Sancheti (Siemens) (34:58.387): So yeah, you know, these are well known in the industry right now. I think it’s it’s some of these are early frontier exercises, but we see that going down the road, you know, with this the this will become much more mainstream and the manufacturing aspects will be better managed as we get more you know more mileage on these these new technologies.

Tova Levy (35:22.905): Yeah. So that’s that’s more of like, you know, the the types of chips that can be manufactured, right? But another trend that’s emerging is physical AI. How does 3D IC fit into that?

Piyush Sancheti (Siemens) (35:36.746): Yeah. Yeah, absolutely. I mean that that is from a market segment standpoint, that is one of the key excitement areas is you know, we’ll see more or more 3D IC systems at the edge, whether that’s robots or autonomous systems or smart devices. They have unique market requirements, right? You when you are in the real world, you want very, very low latency, you want sub-millisecond low latency. You don’t want your car to make a decision, you know, half a second later than it needs to, right? And so sub-millisecond latency is one aspect. Energy efficiency is another aspect. A lot of these devices are low, low power, you know, battery-powered, and therefore have significant you know, energy requirements. Similarly, the ability to dynamically sleep and wake because you don’t want the system to be operating when it doesn’t need to. So there is the energy efficiency part of it. Footprint, you want perform factors that can fit into the real you know real world devices. And then a lot of concerns around reliability, you know, silicon lifecycle, the ability to monitor your devices for health along the way, how does your device age over a certain period of time, safety requirements and security? So, yes, very exciting market segment that has its own unique requirements, but I you know I think 3D ICs provide a very good avenue for being able to sort of meet those market requirements without necessarily having to start from scratch.

Tova Levy (37:21.817): Yeah. Yeah. Piyush, thank you so much for bringing that full circle perspective. This was a great way to finish the season.

Piyush Sancheti (Siemens) (37:31.370): Thank you, Tova. And I enjoyed the the conversation and I look forward to engaging with our audience in future. This is this is a very exciting journey we are on. And you know I have a I have a sense that we haven’t written the last chapter on this this segment.

Tova Levy (38:17.071): So to wrap up the season, we’ve heard from IP developers, manufacturing pioneers, reliability experts, design leaders, and now the full vision. What’s become clear is that 3D IC isn’t just a technology shift, it’s an ecosystem shift. It requires different tools, different partnerships, different ways of thinking about design and manufacturing. It breaks down silos and enforces real collaboration. The upside is enormous. Better performance, lower power, faster time to market, a more resilient supply chain, new market opportunities, and ultimately systems that can tackle the hardest problems we’re facing. If you found this valuable, please share it with your team, subscribe so you don’t miss future seasons, and reach out and let us know what topics matter most to you and which ones resonated most with you on this season. Until next time, stay curious and remember, the future of semiconductors is being written right now. It’s 3D and it’s collaborative. Thank you for listening. I’m Tova Levy and we’ll see you next season.